PM5366-PI datasheet(115/267 Pages) PMC

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PRELIMINARY

PM5366 TEMAP-84

DATASHEET

PMC-2010672

ISSUE 1

HIGH DENSITY 84/63 CHANNEL VT/TU MAPPER

AND M13 MULTIPLEXER

PROPRIETARY AND CONFIDENTIAL

103

9.27 DS3 Mapper Drop Side (D3MD)

Each one of three DS3 Mapper DROP Side (D3MD) blocks demaps a DS3 signal

from an STS-1 (STM-0/AU3) payload. The demapped DS3 is presented to the

DS3 framer and subsequently presented on RDAT[x]. Optionally, it is mapped

into the SBI bus or demultiplexed into 28 DS1s or 21 E1s.

The asynchronous DS3 mapping consists of 9 rows every 125 µs (8 KHz). Each

row contains 621 information bits, 5 stuff control bits, 1 stuff opportunity bit, and

2 overhead communication channel bits. Fixed stuff bytes are used to fill the

remaining bytes. The asynchronous DS3 mapping is shown in Table 5.

Table 5

- Asynchronous DS3 mapping to STS-1 (STM-0/AU3)

2 x 8R

RRCIIIII

25 x 8I

2 x 8R

CCRRRRRR

26 x 8I

2 x 8R

CCRROORS

26 x 8I

2 x 8R

RRCIIIII

25 x 8I

2 x 8R

CCRRRRRR

26 x 8I

2 x 8R

CCRROORS

26 x 8I

2 x 8R

RRCIIIII

25 x 8I

2 x 8R

CCRRRRRR

26 x 8I

2 x 8R

CCRROORS

26 x 8I

STS

2 x 8R

RRCIIIII

25 x 8I

2 x 8R

CCRRRRRR

26 x 8I

2 x 8R

CCRROORS

26 x 8I

POH

2 x 8R

RRCIIIII

25 x 8I

2 x 8R

CCRRRRRR

26 x 8I

2 x 8R

CCRROORS

26 x 8I

2 x 8R

RRCIIIII

25 x 8I

2 x 8R

CCRRRRRR

26 x 8I

2 x 8R

CCRROORS

26 x 8I

2 x 8R

RRCIIIII

25 x 8I

2 x 8R

CCRRRRRR

26 x 8I

2 x 8R

CCRROORS

26 x 8I

2 x 8R

RRCIIIII

25 x 8I

2 x 8R

CCRRRRRR

26 x 8I

2 x 8R

CCRROORS

26 x 8I

2 x 8R

RRCIIIII

25 x 8I

2 x 8R

CCRRRRRR

26 x 8I

2 x 8R

CCRROORS

26 x 8I

R: Fixed Stuff bit - set to logic ‘0’ or ‘1’

C: Stuff Control bit - set to logic ‘1’ for stuff indication

S: Stuff Opportunity bit - when stuff control bit is ‘0’, stuff opportunity is I bit

O: Overhead communication channel

I: DS3 payload information

9.27.1 DS3 Demapper

The D3MD performs majority vote on the received C-bits. If 3 out of 5 C-bits are

‘1’s, the associated S bit is interpreted as a stuff bit. If 3 out of 5 C-bits are ‘0’s,

the associated S bit is interpreted as an Information bit. The information bits are

written to an elastic store and the Fixed Stuff bits (R) are ignored.

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