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PM7366-PI Datasheet(PDF) 238 Page - PMC-Sierra, Inc

Part # PM7366-PI
Description  FRAME ENGINE AND DATA LINK MANAGER
PDF  286 Pages
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Manufacturer  PMC [PMC-Sierra, Inc]
Direct Link  http://www.pmc-sierra.com
Logo PMC - PMC-Sierra, Inc

PM7366-PI Datasheet(HTML) 238 Page - PMC-Sierra, Inc

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RELEASED
PM7366 FREEDM-8
DATA SHEET
PMC-1970930
ISSUE 4
FRAME ENGINE AND DATA LINK MANAGER
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
225
Register 0x3C : Interrupt Line / Interrupt Pin / MIN_GNT / MAX_LAT
Bit
Type
Function
Default
Bit 31
to
Bit 24
R
MAXLAT[7:0]
0FH
Bit 23
to
Bit 16
R
MINGNT[7:0]
05H
Bit 15
to
Bit 8
R
INTPIN[7:0]
01H
Bit 7
to
Bit 0
R/W
INTLNE[7:0]
00H
INTLNE[7:0]:
The Interrupt Line (INTLNE[7:0]) field is used to indicate interrupt line routing information. The
values in this register are system specific and set by the PCI Host.
INTPIN[7:0]:
The Interrupt Pin (INTPIN[7:0]) field is used to specify the interrupt pin the GPIC uses. Since
the GPIC will use INTAB on the PCI bus, the value in this register is set to one.
MINGNT[7:0]:
The Minimum Grant (MINGNT[7:0]) field specifies how long of a burst period the bus master
needs (in increments of 250 nsec).
MAXLAT[7:0]:
The Maximum Latency (MAXLAT[7:0]) field specifies how often a bus master needs access to
the PCI bus (in increments of 250 nsec).



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