AD2 and AD0 to V+ or GND (shown in bold in Table 3).

These selections are guaranteed to be correct at

power-up, independent of SDA and SCL behavior. If

one of the other 12 address combinations is used, an

unexpected combination of pullups might be asserted

sarily the MAX7323) is put on the bus.

I/O Port Inputs

I/O port inputs switch at the CMOS logic levels as

determined by the expander’s supply voltage, and are

overvoltage tolerant to +6V, independent of the

expander’s supply voltage.

I/O Port Input Transition Detection

All four I/O ports configured as inputs are monitored for

changes since the expander was last accessed

through the serial interface. The state of the I/O ports is

stored in an internal “snapshot” register for transition

monitoring. The snapshot is continuously compared

with the actual input conditions, and if a change is

detected for any port input, INT is asserted to signal a

state change. An internal transition flag is set for that

port. The input ports are sampled (internally latched

into the snapshot register) and the old transition flags

read and write access. The previous port transition

flags are read through the serial interface as the sec-

ond byte of a 2-byte read sequence.

A long read sequence (more than 2 bytes) can be used

to poll the expander continuously without the overhead

of resending the slave address. If more than 2 bytes

are read from the expander, the expander repeatedly

returns the input port data, alternating with the transi-

tion flags. The inputs are repeatedly resampled and the

transition flags repeatedly reset for each pair of bytes

read. All changes that occur during a long read

sequence are detected and reported.

The INT output is not reasserted during a read

sequence to avoid recursive reentry into an interrupt

service routine. Instead, if a data change occurs that

would normally cause the INT output to be set, the INT

assertion is delayed until the STOP condition. INT is not

reasserted upon a STOP condition if the changed input

data is read before the STOP occurs. The INT logic

ensures that unnecessary interrupts are not asserted,

yet data changes are detected and reported no matter

when the change occurs.

Port Outputs

Write 1 byte to the MAX7323 to set the output port lev-

els for the four push-pull outputs, and the four open-

drain I/O ports simultaneously.

and 4 Open-Drain I/Os

8

_______________________________________________________________________________________

PIN

CONNECTION

DEVICE ADDRESS

OUTPUTS POWER-UP DEFAULT

40k

Ω INPUT PULLUPS ENABLED

AD2

AD0

A6

A5

A4

A3

A2

A1

A0

O7

O6

P5

P4

P3

P2

O1

O0 O7 O6

P5

P4

P3

P2 O1 O0

SCL

GND

1

1000001

11

1

0

0

0

0

Y

Y

—

—

SCL

V+

1

1000011

11

1

1

1

1

1

Y

Y

Y

Y

SCL

SCL

1

1000101

11

1

1

1

1

1

Y

Y

Y

Y

SCL

SDA

1

1000111

11

1

1

1

1

1

Y

Y

Y

Y

SDA

GND

1

1001001

11

1

0

0

0

0

Y

Y

—

—

SDA

V+

1

1001011

11

1

1

1

1

1

Y

Y

Y

Y

SDA

SCL

1

1001101

11

1

1

1

1

1

Y

Y

Y

Y

SDA

SDA

1

1001111

11

1

1

1

1

1

Y

Y

Y

Y

GND

GND

1

1010000

00

0

0

0

0

0

—

—

—

—

GND

V+

1

1010010

00

0

1

1

1

1

—

—

Y

Y

GND

SCL

1

1010100

00

0

1

1

1

1

—

—

Y

Y

GND

SDA

1

1010110

00

0

1

1

1

1

—

—

Y

Y

V+

GND

1

1011001

11

1

0

0

0

0

Y

Y

—

—

V+

V+

1

1011011

11

1

1

1

1

1

Y

Y

Y

Y

V+

SCL

1

1011101

11

1

1

1

1

1

Y

Y

Y

Y

V+

SDA

1

1011111

11

1

1

1

1

1

Y

YYY

Table 3. MAX7323 Address Map