7.5 Layout

7.5.1 Layout Guidelines

Place input and output capacitors as close to the device pins as possible. To improve characteristic AC

performance such as PSRR, output noise, and transient response, design the board with separate ground

planes for VIN and VOUT, with the ground plane connected only at the GND pin of the device. In addition, the

ground connection for the output capacitor must be connected directly to the GND pin of the device. Higher

value ESR capacitors can degrade PSRR performance.

7.5.2 Layout Examples

IN

GND

OUT

OUT

1

3

2

GND

C

OUT

C

IN

Figure 7-9. Layout Example for DCY (SOT-223) Package

IN

GND

OUT

1

3

2

GND

C

OUT

C

IN

OUT

Figure 7-10. Layout Example for KVU (TO-252) Package

LM1117-Q1

SBVS468 – DECEMBER 2024

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