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GL422 Datasheet(PDF) 26 Page - GENESYS LOGIC |
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GL422 Datasheet(HTML) 26 Page - GENESYS LOGIC |
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26 / 32 page ![]() GL422/GL423 USB 2.0 +SD/MMC-controller Combo Solution ©2000-2006 Genesys Logic Inc. - All rights reserved. Page 26 73 CGND P Digital Ground (Double Bonding) 37 E4 GND 72 PGND P Digital Ground (Double Bonding) 52 CGND P Digital Ground (Double Bonding) 26 E4 GND 51 PGND P Digital Ground (Double Bonding) 25 CGND P Digital Ground (Double Bonding) 10 E4 GND 24 PGND P Digital Ground (Double Bonding) 4.6.6 Test Interface Table 4.6 – Test Interface QFN56 Pin# VFBGA 54 Pin# Pin Name Pad# Pad Name Type Description NC NC 40 PAD_T0 B NC NC 41 PAD_T1 B 17 E6 T2 42 PAD_T2 B 18 F5 T3 43 PAD_T3 B NC NC 32 PAD_T4 B NC NC 33 PAD_T5 B NC NC 7 PAD_T6 B NC NC 6 PAD_T7 B Dual channel flash2 bus bit0 to bit7. (on-chip pulled-up). When power-on or hardware reset, T[3:0] is: 4’b0000: USB CPU Test (CPUTST = 1) 4’b0001: USB UTM Scan Mode (UTMSCANM = 1 ) 4’b0010: USB Scan Mode (SCANMOD = 1) 4’b0011: USB UTM Test (UTMTEST = 1) others: SD Controller Test Mode (T[7:4],T[1:0] no bonding) |
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