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KING BILLION ELECTRONICS CO., LTD

駿億

電

子股

份

有限

公

司

HE83115

HE80000 SERIES

V3.3E

D. Pin Description

Pin #

Pin name

I/O

Function

Description

FXI,

FXO

External

fast

clock

pin.

Connecting to crystal or RC

to generate 32.768 kHz ~

8MHz frequency.

SXI,

SXO

External slow clock pin.

Connecting with 32768 Hz

crystal or resistor as slow

clock and providing clock

source for LCD display,

TIMER1, Time-Base

and

other internal blocks.

Mask option setting：

MO_FCK/SCKN= 00：Slow Clock only

01：Illegal

10：Dual Clock

11：Fast Clock only

MO_FOSCE = 0：Internal fast osc.

= 1：External fast osc.

MO_FXTAL= 0：RC osc. for fast clock

= 1：X’tal osc. for fast clock

MO_SXTAL= 0：RC for 32768 Hz clock

= 1：X’tal for 32768 Hz clock

Use OP1 and OP2 to switch among different operation

mode (NORMAL, SLOW, IDEL and SLEEP). In Dual

Clock mode, the main system clock is still the Fast

Clock. The 32768 Hz clock is for LCD and Timer 1

only.

RSTP_N

System Reset.

Level trigger, active low. Except for using this pin, using

mask option (MO_PORE=1) could enable IC build-in

power-on reset circuit.

Besides, MO_WDTE can set Watch Dog Timer：

MO_WDTE=0：Disable Watch Dog Timer

=1：Enable Watch Dog Timer

TSTP_P

Test Pin

Please bond this pin and add a test point on PCB for

debugging. Leave this pin floating is OK.

1..4

PRTC[3:0]

4-pin bi-directional I/O port.

Mask options：

MO_CPP[3..0]=1 ~ Push-pull.

=0 ~ Open-drain.

Output must be “1” before reading whenever use them

as input (No tri-state structure).

48..

PRTD[7:0]

8-pin bi-directional I/O port.

PRTD[7..2] as wake-up pin.

PRTD[7..6]

external

interrupt pin.

Mask options：

MO_DPP[7..0]=1 ~ Push-pull.

=0 ~ Open-drain.

Output must be “1” before reading whenever use them

as input (No tri-state structure).

7..14

PRT14[7:0]/

SEG[19:12]

8-pin bi-directional I/O port

that is shared with LCD

segment pin.

Mask options：

MO_LIO14[7..0]=1 ~ LCD Pin.

=0 ~ I/O Pin.

MO_14PP[7..0]=1 ~ Push-pull.

=0 ~ Open-drain.

Output must be “1” before reading whenever use them

as input (No tri-state structure).

27..

COM[3:0]

LCD COMmon Output

15..

SEG[11:0]

LCD SEGment Output

LCD Data filled from F0H, please refer the LCD RAM

map.

LC2

Charge Pump Switch 2

LC1

Charge Pump Switch 1

Add one 0.1 µF capacitor between LC1 and LC2. Please refer

the application circuit.

LV3

Charge Pump V3

LV3< 9 Volts.

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