SLFS022 – D1669, SEPTEMBER 1973—REVISED FEBRUARY 1992

NE555, SA555, SE555, SE555C

PRECISION TIMERS

POST OFFICE BOX 655303

12

APPLICATION INFORMATION

frequency divider

By adjusting the length of the timing cycle, the basic circuit of Figure 9 can be made to operate as a frequency

divider. Figure 17 illustrates a divide-by-three circuit that makes use of the fact that retriggering cannot occur

during the timing cycle.

Time – 0.1 ms/div

Capacitor Voltage

Output Voltage

Input Voltage

VCC = 5 V

RA = 1250 Ω

C = 0.02

µF

See Figure 9

Figure 17. Divide-By-Three Circuit Waveforms

pulse-width modulation

The operation of the timer may be modified by modulating the internal threshold and trigger voltages, which is

accomplished by applying an external voltage (or current) to CONT. Figure 18 shows a circuit for pulse-width

modulation. A continuous input pulse train triggers the monostable circuit, and a control signal modulates the

threshold voltage. Figure 19 illustrates the resulting output pulse-width modulation. While a sine-wave

modulation signal is illustrated, any wave shape could be used.