TLC976C

10-BIT, 20 MSPS, AREA CCD SIGNAL PROCESSOR

SLAS193 – OCTOBER 1998

3

POST OFFICE BOX 655303

Terminal Functions

TERMINAL

I/O

DESCRIPTION

NAME

NO.

I/O

DESCRIPTION

AD-STBY

31

I

ADC standby mode

L level in operation

H level in standby mode

AGCCLP

49

I

AGC clamp capacitor (connect 0.1

µF to GND)

AGCGAIN

51

I

AGC gain control

A-SUB

11, 45

Analog GND

AVDD

28, 32, 33

ADC analog power supply

AVSS

34, 39, 42,

43

Analog GND for ADC

BLK-PULSE

3

I

DRIVE-OUT terminal is clamped to 1.66 V internally when BLK-PULSE = L.

CDS-STBY

8

I

CDS/AGC standby mode control

L level in operation

H level in standby mode

CLK

29

I

CLK input for ADC

CLP2

54

I

CCD signal clamp control input

D0–D9

14–18,

21–25

O

Digital data output, D0 (pin 14): LSB, D9 (pin 25): MSB

DATA-IN

53

I

CCD signal input

DRIVE-OUT

6

O

CDS/AGC output

D-SUB

12, 40

Analog GND

DVDD

20, 44

ADC digital power supply

DVSS

13, 19, 27

Digital GND for ADC

GND1

2

I

CDS/AGC analog GND

GND2

47

CDS/AGC analog GND

GND3

7

GND for CDS output circuit

OBCLP

50

I

Control input for clamping optical black level after AGC

OE

30

I

ADC output enable

L level in operation

H level in Hi-Z

OFFSET

4

I

CDS/AGC output offset control:

DC voltage at OFFSET pin

DRIVE-OUT offset

0 V

– 450 mV

0.5 V

– 280 mV

3 V

550 mV

PIN

52

I

CCD signal input

RESET

26

I

Reset for calibration circuit. Restart of startup calibration.

SHV

1

I

CCD signal level sample clock input

SH-PULSE

48

I

Sample and hold pulse input

SHR

56

I

CCD reset level sample clock input

VCC1

55

CDS/AGC analog power supply

VCC2

46

CDS/AGC analog power supply

VCC3

5

CDS/AGC analog power supply

VIN

41

I

ADC analog signal input

VRB-OUT

9

O

ADC bottom reference voltage output (1.5 V typ)

VRB-IN

37, 38

I

Connect to VRB-OUT

VRT-OUT

10

O

ADC top reference voltage output (3.5 V typ)

VRT-IN

35, 36

I

Connect to VRT-OUT