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DDC101

®

The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN

assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject

to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not

authorize or warrant any BURR-BROWN product for use in life support devices and/or systems.

An internal test current source is provided for basic func-

tionality testing and diagnostics. This approximately 100nA

current source is pin activated and sums with the external

input current.

Figure 3 shows a more detailed circuit configuration of the

DDC101. The single integration capacitor, C

INT, and the

D/A converter have been replaced with a high resolution

Capacitor Digital-to-Analog Converter (CDAC). By switch-

ing between ground and V

REF the binary weighted capacitor

array of the CDAC accumulates the input signal’s charge to

keep the comparator input at virtual ground.

FIGURE 3. DDC101 Detailed Circuit Diagram.

Reset

Comparator

Sensor

Serial I/O

Register

DATA

INPUT

DATA

OUTPUT

High

Resolution

Digital Out

3rd Order Digital

Integration,

Tracking and

Control Logic

Digital

Filter

Oversampled

Digital Out

C

INT

Buffer

V

REF

SYSTEM

CLOCK

System Control

DATA

CLOCK

DATA

TRANSMIT

CDAC

DDC101

+V

S

Test Current

TEST

In

ANALOG

In

ANALOG

COMMON

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