LTC4223-1/LTC4223-2

23

422312f

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

PACKAGE DESCRIPTION

4.00

±0.10

(2 SIDES)

5.00

±0.10

(2 SIDES)

NOTE:

1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WJGD-2) IN JEDEC

PACKAGE OUTLINE MO-229

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE

TOP AND BOTTOM OF PACKAGE

0.40

± 0.10

BOTTOM VIEW—EXPOSED PAD

2.44

± 0.10

(2 SIDES)

0.75

±0.05

R = 0.115

TYP

R = 0.20

TYP

4.34

±0.10

(2 SIDES)

1

8

16

9

PIN 1

TOP MARK

(SEE NOTE 6)

0.200 REF

0.00 – 0.05

(DHD16) DFN 0504

0.25

± 0.05

PIN 1

NOTCH

0.50 BSC

4.34

±0.05

(2 SIDES)

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

2.44

±0.05

(2 SIDES)

3.10

±0.05

0.50 BSC

0.70

±0.05

4.50

±0.05

PACKAGE

OUTLINE

0.25

± 0.05

DHD Package

16-Lead Plastic DFN (5mm × 4mm)

(Reference LTC DWG # 05-08-1707)