LTC1421 datasheet(4/24 Pages) LINER

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LTC4223-1/LTC4223-2

422312f

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

ITMR(UP)

TIMER Pull-Up Current

VTIMER = 1V, Initial Timing Cycle

VTIMER = 0V, In AUX Fault Mode

VTIMER = 0V, In 12V Fault Mode

●

–7

–140

–10

–200

–13

–260

μA

ITMR(DN)

TIMER Pull-Down Current

VTIMER = 2V, No Faults

VTIMER = 2V, In Reset Mode

●

1.3

2.6

μA

Open Drain Outputs

VOL

Output Low Voltage (⎯F⎯A⎯U⎯L⎯T, ⎯1⎯2⎯P⎯G⎯O⎯O⎯D,

⎯A⎯U⎯X⎯P⎯G⎯O⎯O⎯D)

IOL = 3mA

●

0.15

0.4

VOH

Output High Voltage (⎯F⎯A⎯U⎯L⎯T, ⎯1⎯2⎯P⎯G⎯O⎯O⎯D,

⎯A⎯U⎯X⎯P⎯G⎯O⎯O⎯D)

(Note 5)

●

VCC – 1

IPU

Output Pin Pull-Up Current (⎯F⎯A⎯U⎯L⎯T,

⎯1⎯2⎯P⎯G⎯O⎯O⎯D, ⎯A⎯U⎯X⎯P⎯G⎯O⎯O⎯D)

VPU = 1.5V

●

–6

–10

–14

μA

Logic Inputs

VIN(TH)

Logic Input Threshold (12ON, AUXON, ⎯E⎯N)

●

0.8

IIN(LEAK)

Input Leakage Current (12ON, AUXON)

VIN = VCC

●

±1

μA

RPU

⎯E⎯N Pin Pull-Up Resistance

●

100

140

kΩ

Other Pin Functions

I12VSENSE

12VSENSE Pin Input Current

V12VSENSE = 12V

●

100

μA

I12VOUT

12VOUT Pin Input Current

Gate Drive On, V12VOUT = 12V

●

100

μA

ROUT(DIS)

OUT Pin Discharge Resistance

12VOUT

AUXOUT

Gate Drive Off

V12VOUT = 6V

VAUXVOUT = 2V

●

400

375

800

750

1600

1500

Propagation Delays

tCB

AUX Circuit Breaker Trip Delay

After Power Up

●

μs

tPHL(SENSE)

Sense Voltage, (12VIN – 12VSENSE)

High to 12VGATE Low

ΔVSENSE = 300mV, C12VGATE = 10nF

ΔVSENSE = 100mV, C12VGATE = 10nF

●

0.5

μs

tPHH(AUXON)

AUXON High to AUXOUT High

●

μs

tPHH(12ON)

12ON High to 12VGATE High

●

μs

tRST(ON)

Input Low (12ON, AUXON) to ⎯F⎯A⎯U⎯L⎯T High

●

μs

tRST(VCC)

VCC Low to ⎯F⎯A⎯U⎯L⎯T High

●

150

μs

tPLL(UVLO)

12VIN Low to 12VGATE Low

●

612

μs

AUXIN Low to ⎯A⎯U⎯X⎯P⎯G⎯O⎯O⎯D High

●

612

μs

tPHL(GATE)

⎯E⎯N High to 12VGATE Low

●

μs

tPLH(PG)

12VOUT Low to ⎯1⎯2⎯P⎯G⎯O⎯O⎯D High

●

μs

AUXOUT Low to ⎯A⎯U⎯X⎯P⎯G⎯O⎯O⎯D High

●

μs

tP(12IMON)

Input Sense Voltage Step to 12IMON

Propagation Delay

ΔVSENSE = 100mV

●

μs

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: All currents into device pins are positive; all currents out of

the device pins are negative. All voltages are referenced to GND unless

otherwise speciﬁed.

Note 3: An internal clamp limits the 12VGATE pin to a minimum of 4.5V

above 12VOUT. Driving this pin to voltages beyond the clamp may damage

the device.

Note 4: For the DFN package, the AUX switch on resistance, RDS(ON) limit

is guaranteed by correlation to wafer test measurements.

Note 5: The output pins ⎯F⎯A⎯U⎯L⎯T, ⎯1⎯2⎯P⎯G⎯O⎯O⎯D and ⎯A⎯U⎯X⎯P⎯G⎯O⎯O⎯D have an internal

pull-up to VCC of 10μA. However, an external pull-up resistor may be used

when faster rise time is required or for VOH voltages greater than VCC.

ELECTRICAL CHARACTERISTICS The ● denotes the speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are TA = 25°C, VCC = 3.3V, VAUXIN = 3.3V, V12VIN =12V, unless otherwise speciﬁed. (Note 2)

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