CC2564C datasheet(13/58 Pages) TI2

13 / 58 page

CC2564C

www.ti.com

SWRS199B – APRIL 2016 – REVISED JUNE 2020

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Product Folder Links: CC2564C

Specifications

5.8

Timing and Switching Characteristics

5.8.1

Device Power Supply

The CC2564C power-management hardware and software algorithms provide significant power savings,

which is a critical parameter in an MCU-based system.

The power-management module is optimized for drawing extremely low currents.

5.8.1.1

Power Sources

The CC2564C device requires two power sources:

•

VDD_IN: main power supply for the device

•

VDD_IO: power source for the 1.8-V I/O ring

The HCI module includes several on-chip voltage regulators for increased noise immunity and can be

connected directly to the battery.

5.8.1.2

Device Power-Up and Power-Down Sequencing

The device includes the following power-up requirements (see Figure 5-1):

•

nSHUTD must be low. VDD_IN and VDD_IO are don't care I/O pins when nSHUTD is low. However,

signals are not allowed on the I/O pins if I/O power is not supplied, because the I/Os are not fail-safe.

Exceptions are SLOW_CLK_IN and AUD_xxx, which are fail-safe and can tolerate external voltages

with no VDD_IO and VDD_IN.

•

VDD_IO and VDD_IN must be stable before releasing nSHUTD.

•

The fast clock must be stable within 20 ms of nSHUTD going high.

•

The slow clock must be stable within 2 ms of nSHUTD going high.

The device indicates that the power-up sequence is complete by asserting RTS low, which occurs up to

100 ms after nSHUTD goes high. If RTS does not go low, the device is not powered up. In this case,

ensure that the sequence and requirements are met.

CC2564C Datasheet(PDF) 13 Page - Texas Instruments