FB

SW

L1

R1

LM34919B

R2

R3

C2

VOUT

LM34919B

LM34919B-Q1

SNVS623B – MAY 2010 – REVISED JULY 2013

www.ti.com

Figure 34. Alternate Minimum Output Ripple Configuration

Minimum Load Current

The LM34919B requires a minimum load current of 1 mA. If the load current falls below that level, the bootstrap

capacitor (C4) may discharge during the long off-time, and the circuit will either shutdown, or cycle on and off at

a low frequency. If the load current is expected to drop below 1 mA in the application, R1 and R2 should be

chosen low enough in value so they provide the minimum required current at nominal VOUT.

PC Board Layout

Refer to application note AN-1112 for PC board guidelines for the DSBGA package.

The LM34919B regulation, over-voltage, and current limit comparators are very fast, and respond to short

duration noise pulses. Layout considerations are therefore critical for optimum performance. The layout must be

as neat and compact as possible, and all of the components must be as close as possible to their associated

pins. The two major current loops have currents which switch very fast, and so the loops should be as small as

possible to minimize conducted and radiated EMI. The first loop is that formed by C1, through the VIN to SW

pins, L1, C2, and back to C1.The second current loop is formed by D1, L1, C2 and the SGND and ISEN pins.

The power dissipation within the LM34919B can be approximated by determining the total conversion loss (PIN -

POUT), and then subtracting the power losses in the free-wheeling diode and the inductor. The power loss in the

diode is approximately:

PD1 = Iout x VF x (1-D)

(20)

where Iout is the load current, VF is the diode’s forward voltage drop, and D is the on-time duty cycle. The power

loss in the inductor is approximately:

PL1 = Iout

2 x R

L x 1.1

(21)

where RL is the inductor’s DC resistance, and the 1.1 factor is an approximation for the AC losses. If it is

expected that the internal dissipation of the LM34919B will produce excessive junction temperatures during

normal operation, good use of the PC board’s ground plane can help to dissipate heat. Additionally the use of

wide PC board traces, where possible, can help conduct heat away from the IC. Judicious positioning of the PC

board within the end product, along with the use of any available air flow (forced or natural convection) can help

reduce the junction temperatures.

20

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