8 Detailed Description

8.1 Overview

The TPS3809xxx-Q1 device is a low-current supervisory circuit for monitoring system voltages above 2 V. The

device asserts an active-low RESET signal when VDD drops below a preset threshold. The RESET output

remains low until VDD returns above its threshold. The device design is also to be relatively immune to short

negative transients on the VDD pin.

8.2 Functional Block Diagram

R2

_

+

R1

VDD

GND

RESET

TPS3809xxx-Q1

Oscillator

Reference

Voltage

of 1.137 V

Reset

Logic

+

Timer

8.3 Feature Description

8.3.1 VDD Monitoring

The VDD pin provides a terminal at which a system voltage can be monitored. If the voltage on this pin drops

below VIT, RESET is asserted low. The comparator has a built-in hysteresis to ensure smooth RESET assertions

and deassertions. Refer to Section 5 to determine the VDD voltage threshold for each device.

8.4 Device Functional Modes

TPS3809xxx-Q1 monitors one supply using the VDD pin. When VDD is above the VIT threshold for the device,

RESET will be high. When VDD is below the VIT threshold for the device, RESET will be low.

TPS3809J25-Q1, TPS3809L30-Q1, TPS3809K33-Q1, TPS3809I50-Q1

SGLS142C – DECEMBER 2002 – REVISED DECEMBER 2020

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