LP3905

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SNVS374D – JUNE 2006 – REVISED MAY 2013

General Electrical Characteristics

(1) (2) (3)

Limits in standard typeface are for TJ = 25°C. Limits in boldface type apply over the full junction temperature range (−40°C ≤

TJ ≤ +125°C). Unless otherwise noted, specifications apply to the LP3905 Typical Application Circuit (Figure 1)

Parameter

Test Conditions

Min

Typ

Max

Units

Login Input Thresholds

VIN

Input Voltage Range

3

5.5

V

Shutdown Supply Current

All Circuits OFF except for POR and UVLO

6.5

10.0

µA

LDO1 and 2 and Buck1 and 2 on

140

250

IQ

No load Supply Current(4)

(PWM only versions) LDO1 and 2 and

7

10.0

mA

Buck1 and 2 on

VIH

Logic High Input

VIN = 3.0V to 5.5V

1.2

V

VIL

Logic Low Input

VIN = 3.0V to 5.5V

0.4

V

EN1/EN2 = 5.5V and VIN= 5.5V

2.1

5

8.5

µA

IEN

Enable (EN1,2) Input Current(5)

EN1/EN2 = 0V and VIN= 5.5V

0.001

0.1

µA

VUVLO-R

Battery Under Voltage Lock-Out

VIN Rising

2.7

3.1

V

Temperature

160

TSHUTDOWN

Thermal Shutdown(4)

°C

Hysteresis

20

(1)

All voltages are with respect to the potential at the GND pin.

(2)

Min and Max limits are ensured by design, test or statistical analysis. Typical numbers are not ensured, but do represent the most likely

norm.

(3)

The parameters in the electrical characteristic table are tested at VIN= 3.8V unless otherwise specified. For performance over the input

voltage range refer to datasheet curves.

(4)

This specification is ensured by design.

(5)

There is a 1 M

Ω resistor between EN1,EN2 and ground on the device.

Buck Regulator Electrical Characteristics

(1) (2) (3)

Buck 1 and 2 have a current rating of Imax= 600mA. Unless otherwise specified, limits are set with VIN = VEN1/2 = 3.8V,

VOUT(Buck1)= Vnom1 , VOUT(Buck2)= Vnom2 and CIN= COUT=10µF.

Limits in standard typeface are for TJ = 25°C. Limits in boldface type apply over the full junction temperature range (−40°C ≤

TJ ≤ +125°C). Unless otherwise noted, specifications apply to the LP3905 Typical Application Circuit (Figure 1)

(1) (2) (4)

Parameter

Test Conditions

Min

Typ

Max

Units

VFB

Feedback Voltage

See(5)

-4

+4

%

3.0V

≤ VIN ≤ 5.5V

Line Regulation

0.045

%/V

IO = 1mA

VOUT

Load Regulation

100 mA

≤ IO ≤ 600mA

0.002

%/mA

RDSON (P)

Pin-Pin Resistance for PFET

VIN= VGS= 3.6V

380

500

m

Ω

RDSON (N)

Pin-Pin Resistance for NFET

VIN= VGS= 3.6V

(6)

250

400

m

Ω

ILIM

Switch Peak Current Limit

Open Loop

650

1000

1220

mA

FOSC

Internal Oscillator Frequency

PWM Mode

2

MHz

IOUT = 5mA, PFM mode(6)

88

η

Efficiency

%

IOUT = 300mA, PWM mode(6)

90

(1)

All voltages are with respect to the potential at the GND pin.

(2)

Min and Max limits are ensured by design, test or statistical analysis. Typical numbers are not ensured, but do represent the most likely

norm.

(3)

The parameters in the electrical characteristic table are tested at VIN= 3.8V unless otherwise specified. For performance over the input

voltage range refer to datasheet curves.

(4)

CIN, COUT: Low-ESR Surface-Mount Ceramic Capacitors (MLCCs) used in setting electrical characteristics.

(5)

For the adjustable version, feedback resistor values should be chosen for the divider network to ensure that at the desired output

voltage the feedback pin is at 0.5V. See Buck Converter Applications Information.

(6)

This specification is ensured by design.

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