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AMC1336

SBAS951B – AUGUST 2019 – REVISED APRIL 2020

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Use a power supply with a nominal voltage of 3.3 V for DVDD to directly connect all modulators to the

microcontroller.

For modulator output bitstream filtering, a device from TI's TMS320F2807x family of low-cost microcontrollers

(MCUs) or TMS320F2837x family of dual-core MCUs is recommended. These MCU families support up to eight

channels of dedicated hardwired filter structures called sigma-delta filter modules (SDFMs) that significantly

simplify system level design by offering two filtering paths per channel: one providing high accuracy results for

the control loop and one that offers a fast response path for overcurrent detection. Use one of the pulse-width

modulation (PWM) sources inside the MCU to generate the clock for the modulators and for easy

synchronization of all feedback signals and the switching control of the gate drivers.

The application examples in Figure 50 and Figure 51 use a clock buffer to distribute the clock reference signal

generated on one of the PWMx outputs of the MCU to all modulators used in the circuit and as a reference for

the digital filters in the MCU. In this example, TI's CDCLVC1106 is used for this purpose. Each CDCLVC1106

output can drive a load of 8 pF that is sufficient to drive up to two modulator and up to four SDFM clock inputs.

8.2.3 Application Curve

The effective number of bits (ENOB) is often used to compare the performance of ADCs and ΔΣ modulators.

Figure 52 shows the ENOB of the AMC1336 with different oversampling ratios. In this document, this number is

calculated from the SINAD by using following equation: SINAD = 1.76 dB + 6.02 × ENOB.

Figure 52. Measured Effective Number of Bits versus Oversampling Ratio

8.2.4 What to Do and What Not to Do

Do not leave the inputs of the AMC1336 unconnected (floating) when the device is powered up. If either

modulator input is left floating, the input bias current can drive this input beyond the specified common-mode

input voltage range. If both inputs are beyond that range, the gain of the front-end diminishes and the output

bitstream is not valid.