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ADS1113 Datasheet(PDF) 12 Page - Texas Instruments

Part # ADS1113
Description  ADS101x Ultra-Small, Low-Power, I2C-Compatible, 3.3kSPS, 12-Bit ADCs With Internal Reference, Oscillator, and Programmable Comparator
PDF  49 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

ADS1113 Datasheet(HTML) 12 Page - Texas Instruments

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7.3.7 Digital Comparator (ADS1014 and ADS1015 Only)
The ADS1015 and ADS1014 feature a programmable digital comparator that can issue an alert on the
ALERT/RDY pin. The COMP_MODE bit in the Config register configures the comparator as either a traditional
comparator or a window comparator. In traditional comparator mode, the ALERT/RDY pin asserts (active low by
default) when conversion data exceeds the limit set in the high-threshold register (Hi_thresh). The comparator
then deasserts only when the conversion data falls below the limit set in the low-threshold register (Lo_thresh).
In window comparator mode, the ALERT/RDY pin asserts when the conversion data exceed the Hi_thresh
register or fall below the Lo_thresh register value.
In either window or traditional comparator mode, the comparator can be configured to latch after being asserted
by the COMP_LAT bit in the Config register. This setting causes the assertion to remain even if the input signal
is not beyond the bounds of the threshold registers. This latched assertion can only be cleared by issuing an
SMBus alert response or by reading the Conversion register. The ALERT/RDY pin can be configured as active
high or active low by the COMP_POL bit in the Config register. Operational diagrams for both the comparator
modes are shown in Figure 7-7.
The comparator can also be configured to activate the ALERT/RDY pin only after a set number of
successive readings exceed the threshold values set in the threshold registers (Hi_thresh and Lo_thresh). The
COMP_QUE[1:0] bits in the Config register configures the comparator to wait for one, two, or four readings
beyond the threshold before activating the ALERT/RDY pin. The COMP_QUE[1:0] bits can also disable the
comparator function, and put the ALERT/RDY pin into a high state.
TH_H
TH_L
Time
Time
Time
Successful
SMBus Alert
Response
Successful
SMBus Alert
Response
Latching
Comparator
Output
Non-Latching
Comparator
Output
Input Signal
TH_H
TH_L
Time
Time
Time
Successful
SMBus Alert
Response
Latching
Comparator
Output
Non-Latching
Comparator
Output
Input Signal
WINDOW COMPARATOR MODE
TRADITIONAL COMPARATOR MODE
Figure 7-7. ALERT Pin Timing Diagram
ADS1013, ADS1014, ADS1015
SBAS473F – MAY 2009 – REVISED JANUARY 2025
www.ti.com
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Copyright © 2025 Texas Instruments Incorporated
Product Folder Links: ADS1013 ADS1014 ADS1015



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