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ADS1148IPWR Datasheet(PDF) 40 Page - Texas Instruments

Part # ADS1148IPWR
Description  ADS114x 16-Bit, 2-kSPS, Analog-to-Digital Converters With Programmable Gain Amplifier (PGA) for Sensor Measurement
PDF  100 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

ADS1148IPWR Datasheet(HTML) 40 Page - Texas Instruments

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DIN
0100 0010
0000 0001
MUX1
SYS0
1
st
Command
2
nd
Command
Data
Byte
Data
Byte
DIN
DOUT
VBIAS
00100001 00000001
1st
Command
Byte
2nd
Command
Byte
MUX1
DataByte
DataByte
40
ADS1146, ADS1147, ADS1148
SBAS453G – JULY 2009 – REVISED AUGUST 2016
www.ti.com
Product Folder Links: ADS1146 ADS1147 ADS1148
Submit Documentation Feedback
Copyright © 2009–2016, Texas Instruments Incorporated
9.5.3.7 SDATAC (0001 011x)
The SDATAC command terminates read data continuous mode. In stop read data continuous mode, the
conversion result is not automatically loaded onto DOUT when DRDY goes low, and register read operations can
be performed without interruption from new conversion results being loaded into the output shift register. Use the
RDATA command to retrieve conversion data. The SDATAC command takes effect after the next DRDY.
If DRDY is not actively monitored for data conversions, the stop read data continuous mode is the preferred
method of reading data. In this mode, a read of ADC data is not interrupted by the completion of a new ADC
conversion.
9.5.3.8 RREG (0010 rrrr, 0000 nnnn)
The RREG command outputs the data from up to 15 registers, starting with the register address specified as part
of the instruction. The number of registers read is one plus the value of the second byte. If the count exceeds the
remaining registers, the addresses wrap back to the beginning. The two byte command structure for RREG is
listed below.
•
First Command Byte: 0010 rrrr, where rrrr is the address of the first register to read.
•
Second Command Byte: 0000 nnnn, where nnnn is the number of bytes to read –1.
•
Byte(s): data read from the registers are clocked out with NOPs.
It is not possible to use the full-duplex nature of the serial interface when reading out the register data. For
example, a SYNC command cannot be issued when reading out the VBIAS and MUX1 data, as shown in
Figure 52. Any command sent during the readout of the register data is ignored. Thus, TI recommends sending
NOPs through DIN when reading out the register data.
Figure 52. Read from Register
9.5.3.9 WREG (0100 rrrr, 0000 nnnn)
The WREG command writes to the registers, starting with the register specified as part of the instruction. The
number of registers that are written is one plus the value of the second byte. The command structure for WREG
is listed below.
•
First Command Byte: 0100 rrrr, where rrrr is the address of the first register to be written.
•
Second Command Byte: 0000 nnnn, where nnnn is the number of bytes to be written – 1.
•
Byte(s): data to be written to the registers.
Figure 53. Write to Register



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