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ELECTRICAL CHARACTERISTICS

ADS5231

SBAS295A – JULY 2004 – REVISED JANUARY 2007

T

MIN = –40°C and TMAX = +85°C. Typical values are at TA = +25°C, clock frequency = 40MSPS, 50% clock duty cycle,

AVDD = 3.3V, VDRV = 3.3V, transformer-coupled inputs, –1dBFS, I

SET = 56.2kΩ, and internal voltage reference, unless

otherwise noted.

ADS5231

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNITS

DC ACCURACY

No Missing Codes

Tested

DNL Differential Nonlinearity

fIN = 5MHz

–0.9

±0.3

+0.9

LSB

INL Integral Nonlinearity

fIN = 5MHz

–2.5

±0.4

+2.5

LSB

Offset Error(1)

–0.75

±0.2

+0.75

% FS

Offset Temperature Coefficient(2)

±6

ppm/

°C

Fixed Attenuation in Channel(3)

1

%FS

Fixed Attenuation Matching Across Channels

0.01

0.2

dB

Gain Error/Reference Error(4)

–3.5

±1.0

+3.5

% FS

Gain Error Temperature Coefficient

±40

ppm/

°C

POWER REQUIREMENTS(5)

Internal Reference

Power Dissipation(5)

Analog Only (AVDD)

235.5

271

mW

Output Driver (VDRV)

85.5

109

mW

Total Power Dissipation

321

380

mW

External Reference

Power Dissipation

Analog Only (AVDD)

200

mW

Output Driver (VDRV)

85.5

mW

Total Power Dissipation

285.5

mW

Total Power-Down

Clock Running

83

mW

REFERENCE VOLTAGES

VREFT Reference Top (internal)

1.9

2.0

2.1

V

VREFB Reference Bottom (internal)

0.9

1.0

1.1

V

VCM Common-Mode Voltage

1.4

1.5

1.6

V

VCM Output Current(6)

±50mV Change in Voltage

±2

mA

VREFT Reference Top (external)

1.875

V

VREFB Reference Bottom (external)

1.125

V

External Reference Common-Mode

VCM ± 50mV

V

External Reference Input Current(7)

1.0

mA

(1)

Offset error is the deviation of the average code from mid-code with –1dBFS sinusoid from ideal mid-code (2048). Offset error is

expressed in terms of % of full-scale.

(2)

If the offset at temperatures T1 and T2 are O1 and O2, respectively (where O1 and O2 are measured in LSBs), the offset temperature

coefficient in ppm/

°C is calculated as (O

1 – O2)/(T1 – T2) × 1E6/4096.

(3)

Fixed attenuation in the channel arises because of a fixed attenuation in the sample-and-hold amplifier. When the differential voltage at

the analog input pins is changed from –VREF to +VREF, the swing of the output code is expected to deviate from the full-scale code

(4096LSB) by the extent of this fixed attenuation. NOTE: VREF is defined as (REFT – REFB).

(4)

The reference voltages are trimmed at production so that (VREFT – VREFB) is within ± 35mV of the ideal value of 1V. This specification

does not include fixed attenuation.

(5)

Supply current can be calculated from dividing the power dissipation by the supply voltage of 3.3V.

(6)

The VCM output current specified is the drive of the VCM buffer if loaded externally.

(7)

Average current drawn from the reference pins in the external reference mode.

4

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