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ADS54J69IRMP Datasheet(PDF) 7 Page - Texas Instruments

Part # ADS54J69IRMP
Description  ADS54J69 Dual-Channel, 16-Bit, 500-MSPS, Analog-to-Digital Converter
PDF  83 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

ADS54J69IRMP Datasheet(HTML) 7 Page - Texas Instruments

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7
ADS54J69
www.ti.com
SBAS713C – MAY 2015 – REVISED JANUARY 2017
Product Folder Links: ADS54J69
Submit Documentation Feedback
Copyright © 2015–2017, Texas Instruments Incorporated
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
(1)
MIN
MAX
UNIT
Supply voltage range
AVDD3V
–0.3
3.6
V
AVDD
–0.3
2.1
DVDD
–0.3
2.1
IOVDD
–0.2
1.4
Voltage between AGND and DGND
–0.3
0.3
V
Voltage applied to input pins
INAP, INBP, INAM, INBM
–0.3
3
V
CLKINP, CLKINM
–0.3
AVDD + 0.3
SYSREFP, SYSREFM
–0.3
AVDD + 0.3
SCLK, SEN, SDIN, RESET, SYNC, PDN
–0.2
2.1
Storage temperature, Tstg
–65
150
°C
(1)
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2)
JEDEC document JEP157 states that 250-V HBM allows safe manufacturing with a standard ESD control process.
7.2 ESD Ratings
VALUE
UNIT
V(ESD)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
±1000
V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2)
±500
(1)
SYSREF must be applied for the device to initialize; see the SYSREF Signal section for details.
(2)
After power-up, always use a hardware reset to reset the device for the first time; see Table 60 for details.
(3)
Operating 0.5 dB below the maximum-supported amplitude is recommended to accommodate gain mismatch in interleaving ADCs.
(4)
At high frequencies, the maximum supported input amplitude reduces; see Figure 51 for details.
(5)
Prolonged use above the nominal junction temperature can increase the device failure-in-time (FIT) rate.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
(1) (2)
MIN
NOM
MAX
UNIT
Supply voltage range
AVDD3V
2.85
3.0
3.6
V
AVDD
1.8
1.9
2.0
DVDD
1.7
1.9
2.0
IOVDD
1.1
1.15
1.2
Analog inputs
Differential input voltage range
1.9
VPP
Input common-mode voltage
2.0
V
Maximum analog input frequency for 1.9-VPP input amplitude
(3) (4)
400
MHz
Clock inputs
Input clock frequency, device clock frequency
500
1000
MHz
Input clock amplitude differential
(VCLKP – VCLKM)
Sine wave, ac-coupled
0.75
1.5
VPP
LVPECL, ac-coupled
0.8
1.6
LVDS, ac-coupled
0.7
Input device clock duty cycle
45%
50%
55%
Temperature
Operating free-air, TA
–40
85
ºC
Operating junction, TJ
105(5)
125



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