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STA529Q Datasheet(PDF) 41 Page - STMicroelectronics |
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STA529Q Datasheet(HTML) 41 Page - STMicroelectronics |
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41 / 57 page ![]() STA529 Registers Doc ID 13095 Rev 3 41/57 TTF1 Tri-state time after fault (LSBs) Address: 0x06 Type: R/W Buffer: No Reset: 0x02 Description: TTP0 Tri-state time after power-up (MSBs) Address: 0x07 Type: R/W Buffer: No Reset: 0x00 Description: TTP1 Tristate time after power-up (LSBs) Address: 0x08 Type: R/W Buffer: No Reset: 0x02 Description: Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 TIM_TS_FAULT[7:0] 7:0 LSBs of TIM_TS_FAULT[15:0]: time in which power is held in tristate mode after a fault signal: Time is TIM_TS_FAULT * 83.33 µs. Default value (0x0002) corresponds to 166.66 µs tristate time after fault Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 TIM_TS_POWUP[15:8] 7:0 MSBs of TIM_TS_POWUP[15:0]: See register TTP1 below. Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 TIM_TS_POWUP[7:0] 7:0 LSBs of TIM_TS_POWUP[15:0]: time in which power is held in tri-state mode after a power-up signal: Time is TIM_TS_POWUP * 83.33 µs Default value (0x0002) corresponds to 166.66 µs tristate time after power-up |
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