CDx4AC74 Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear And Preset

1 Features

• AC types feature 1.5V to 5.5V operation and

balanced noise immunity at 30% of the supply

• Speed of bipolar F, AS, and S, with significantly

reduced power consumption

• Balanced propagation delays

• ±24mA output drive current – fanout to 15 F

devices

• SCR-latchup-resistant CMOS process and circuit

design

2 Description

The ’AC74 dual positive-edge-triggered devices are

D-type flip-flops.

Device Information

PART NUMBER

PACKAGE(1)

PACKAGE SIZE(2)

BODY SIZE(3)

CDx4AC74

J (CDIP, 14)

19.56mm × 7.9mm

19.56mm × 6.67mm

N (PDIP, 14)

19.3mm x 9.4mm

19.3mm x 6.35mm

D (SOIC, 14)

8.65mm x 6mm

8.65mm x 3.9mm

(1)

For more information, see Section 10.

(2)

The package size (length × width) is a nominal value and

includes pins, where applicable.

(3)

The body size (length × width) is a nominal value and does

not include pins.

Copyright © 2016, Texas Instruments Incorporated

Logic Diagram, Each Flip-Flop (Positive Logic)

CD54AC74, CD74AC74

SCHS231E – NOVEMBER 1998 – REVISED AUGUST 2024

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.