L9678P datasheet(137/215 Pages) STMICROELECTRONICS

137 / 215 page

DS11626 Rev 9

137/216

L9678P, L9678P-S

Watchdog timer

214

Watchdog timer

This device offers a watchdog implementation by means of a temporal WD. Window times

are SPI programmable and a couple of specific codes has to be written within this window in

order to serve the WD control.

8.1

Temporal watchdog

The temporal watchdog ensures the system software is operating correctly by requiring

periodic service from the microcontroller at a programmable rate. This service (watchdog

refresh) must occur within a time window, and if serviced too early or too late will enter an

error state (WD1_ERROR) reported via the WD1_WDR bit of the FLTSR register.

The overall WD1 functionality is described in the state diagram reported in Figure 36.

Figure 36. Watchdog state diagram

GAPGPS01135

WD1 INITIAL

WD1 RUN

WD1 TEST

SPI WD1_TEST /

WD1 refresh OK /

WD1_WDR=0

WD1_ERR_TH_WE=0

If (WD1_ERR_CNT<WD1_ERR_TH)

WD1_LOCKOUT=0

WD1 refresh OK /

WD1 RESET

WD1_ERROR /

WD1_LOCKOUT=1

WD1_ERR_CNT++

WD1

OVERRIDE

WDT/TM>VWD_OVERRIDE AND

SPI WD1_TEST

WD1_LOCKOUT=0

WSM_Reset

(From any state) /

WD1_LOCKOUT=1

WD1_WDR=0

WD1_ERR_CNT=0

WD1_ERR_TH_WE=1

1ms /

WD1_WDR=1

500ms AND

WD1_TOVR=0 /

WD1_LOCKOUT=1

WD1_ERR_CNT++

L9678P Datasheet(PDF) 137 Page - STMicroelectronics

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