+

±

+

±

+

±

40 k

25 k

40 k

40 k

40 k

25 k

Overvoltage

Protection

Overvoltage

Protection

RG

REF

+VS

V-

OUT

V+

-VS

-IN

+IN

RG

RREF

RG

22

INA828

SBOS792A – AUGUST 2017 – REVISED JANUARY 2018

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Product Folder Links: INA828

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Copyright © 2017–2018, Texas Instruments Incorporated

8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component

specification, and TI does not warrant its accuracy or completeness. TI’s customers are

responsible for determining suitability of components for their purposes. Customers should

validate and test their design implementation to confirm system functionality.

8.1 Reference Terminal

The output voltage of the INA828 is developed with respect to the voltage on the reference terminal, REF. Often,

in dual-supply operation, the reference pin (pin 6) is connected to the low-impedance system ground. In single-

supply operation, offsetting the output signal to a precise mid-supply level is useful (for example, 2.5 V in a 5-V

supply environment). To accomplish this level shift, a voltage source must be connected to the REF pin to level-

shift the output so that the INA828 can drive a single-supply ADC.

The voltage source applied to the reference terminal must have a low output impedance. As illustrated in

Figure 61, any resistance at the reference terminal (shown as RREF in Figure 61) is in series with one of the

internal 40-kΩ resistors.

Figure 61. Parasitic Resistance Shown at the Reference Terminal

The parasitic resistance at the reference terminal, RREF, creates an imbalance in the 4 resistors of the internal

difference amplifier, resulting in degraded common-mode rejection ratio (CMRR). Figure 62 shows the

degradation in CMRR of the INA828 for increasing resistance at the reference terminal. For the best

performance, keep the source impedance to the REF terminal, RREF, below 5 Ω.