7 Detailed Description

7.1 Overview

The PCF8574 device is an 8-bit I/O expander for the two-line bidirectional bus (I2C) is designed for 2.5-V to 6-V

VCC operation. It provides general-purpose remote I/O expansion for most micro-controller families via the I2C

interface (serial clock, SCL, and serial data, SDA, pins).

The PCF8574 device provides an open-drain output ( INT) that can be connected to the interrupt input of a

microcontroller. An interrupt is generated by any rising or falling edge of the port inputs in the input mode. After

time, tiv, INT is valid. Resetting and reactivating the interrupt circuit is achieved when data on the port is changed

to the original setting or data is read from, or written to, the port that generated the interrupt. Resetting occurs

in the read mode at the acknowledge bit after the rising edge of the SCL signal, or in the write mode at the

acknowledge bit after the high-to-low transition of the SCL signal. Interrupts that occur during the acknowledge

clock pulse can be lost (or be very short) due to the resetting of the interrupt during this pulse. Each change of

the I/Os after resetting is detected and, after the next rising clock edge, is transmitted as INT. Reading from, or

writing to, another device does not affect the interrupt circuit. This device does not have internal configuration or

status registers. Instead, read or write to the device I/Os directly after sending the device address (see Figure

7-3 and Figure 7-4).

By sending an interrupt signal on this line, the remote I/O can inform the microcontroller if there is incoming data

on its ports without having to communicate by way of the I2C bus. Therefore, PCF8574 can remain a simple

target device.

An additional strong pullup to VCC allows fast rising edges into heavily loaded outputs. This device turns on when

an output is written high and is switched off by the negative edge of SCL. The I/Os should be high before being

used as inputs.

7.2 Functional Block Diagram

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I/O

Port

4

5

6

7

9

10

11

12

P 0

P 1

P 2

P 3

P 4

P 5

P 6

P 7

Shift

Register

8 Bit

LP Filter

Interrupt

Logic

I2C Bus

Control

Input

Filter

15

Power-On

Reset

Read Pulse

Write Pulse

PCF8574

3

2

1

13

16

8

GND

V

CC

SDA

SCL

A2

A1

A0

INT

Pin numbers shown are for the DW and N packages.

Figure 7-1. Simplified Block Diagram of Device

PCF8574

SCPS068K – JULY 2001 – REVISED SEPTEMBER 2024

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