TMS320F28062F datasheet(46/204 Pages) TI2

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8.1.8 M0, M1 SARAMs

All devices contain these two blocks of single-access memory, each 1K × 16 in size. The stack pointer points

to the beginning of block M1 on reset. The M0 and M1 blocks, like all other memory blocks on C28x devices,

are mapped to both program and data space. Hence, the user can use M0 and M1 to execute code or for data

variables. The partitioning is performed within the linker. The C28x device presents a unified memory map to the

programmer. This makes for easier programming in high-level languages.

8.1.9 L4 SARAM, and L0, L1, L2, L3, L5, L6, L7, and L8 DPSARAMs

The device contains up to 48K × 16 of single-access RAM. To ascertain the exact size for a given device, see

the device-specific memory map figures in Section 8.2. This block is mapped to both program and data space.

L0 is 2K in size. L1 and L2 are each 1K in size. L3 is 4K in size. L4, L5, L6, L7, and L8 are each 8K in size.

L0, L1, and L2 are shared with the CLA, which can use these blocks for its data space. L3 is shared with the

CLA, which can use this block for its program space. L5, L6, L7, and L8 are shared with the DMA, which can use

these blocks for its data space. DPSARAM refers to the dual-port configuration of these blocks.

8.1.10 Boot ROM

The Boot ROM is factory-programmed with boot-loading software. Boot-mode signals are provided to tell the

bootloader software what boot mode to use on power up. The user can select to boot normally or to download

new software from an external connection or to select boot software that is programmed in the internal Flash/

ROM. The Boot ROM also contains standard tables, such as SIN/COS waveforms, for use in math-related

algorithms.

Table 8-1. Boot Mode Selection

MODE

GPIO37/TDO

GPIO34/COMP2OUT/

COMP3OUT

TRST

MODE

GetMode

Wait (see Section 8.1.11 for description)

SCI

Parallel IO

EMU

Debug Boot

8.1.10.1 Debug Boot

When the debug probe is connected, the GPIO37/TDO pin cannot be used for boot mode selection. In this case,

the boot ROM detects that a debug probe is connected and uses the contents of two reserved SARAM locations

in the PIE vector table to determine the boot mode. If the content of either location is invalid, then the Wait boot

option is used. All boot mode options can be accessed in debug boot.

8.1.10.2 GetMode

The default behavior of the GetMode option is to boot to flash. This behavior can be changed to another boot

option by programming two locations in the OTP. If the content of either OTP location is invalid, then boot to flash

is used. One of the following loaders can be specified: SCI, SPI, I2C, CAN, or OTP.

TMS320F28069, TMS320F28069M, TMS320F28069F, TMS320F28068M, TMS320F28068F

TMS320F28067, TMS320F28066, TMS320F28065, TMS320F28064, TMS320F28063

TMS320F28062, TMS320F28062F

SPRS698J – NOVEMBER 2010 – REVISED SEPTEMBER 2021

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TMS320F28062F Datasheet(PDF) 46 Page - Texas Instruments

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