TMS320F28062F datasheet(49/204 Pages) TI2

49 / 204 page

8.1.13 External Interrupts (XINT1 to XINT3)

The devices support three masked external interrupts (XINT1–XINT3). Each of the interrupts can be selected

for negative, positive, or both negative and positive edge triggering and can also be enabled or disabled. These

interrupts also contain a 16-bit free-running up counter, which is reset to zero when a valid interrupt edge is

detected. This counter can be used to accurately time-stamp the interrupt. There are no dedicated pins for the

external interrupts. XINT1, XINT2, and XINT3 interrupts can accept inputs from GPIO0–GPIO31 pins.

8.1.14 Internal Zero Pin Oscillators, Oscillator, and PLL

The device can be clocked by either of the two internal zero-pin oscillators, an external oscillator, or by a crystal

attached to the on-chip oscillator circuit. A PLL is provided supporting up to 16 input-clock-scaling ratios. The

PLL ratios can be changed on-the-fly in software, enabling the user to scale back on operating frequency if lower

power operation is desired. Refer to Section 7, Specifications, for timing details. The PLL block can be set in

bypass mode. A second PLL (PLL2) feeds the HRCAP module.

8.1.15 Watchdog

Each device contains two watchdogs: CPU-watchdog that monitors the core and NMI-watchdog that is a missing

clock-detect circuit. The user software must regularly reset the CPU-watchdog counter within a certain time

frame; otherwise, the CPU-watchdog generates a reset to the processor. The CPU-watchdog can be disabled if

necessary. The NMI-watchdog engages only in case of a clock failure and can either generate an interrupt or a

device reset.

8.1.16 Peripheral Clocking

The clocks to each individual peripheral can be enabled or disabled to reduce power consumption when a

peripheral is not in use. Additionally, the system clock to the serial ports (except I2C) can be scaled relative to

the CPU clock.

8.1.17 Low-power Modes

The devices are full static CMOS devices. Three low-power modes are provided:

IDLE:

Places CPU in low-power mode. Peripheral clocks may be turned off selectively and only

those peripherals that must function during IDLE are left operating. An enabled interrupt

from an active peripheral or the watchdog timer will wake the processor from IDLE mode.

STANDBY:

Turns off clock to CPU and peripherals. This mode leaves the oscillator and PLL functional.

An external interrupt event will wake the processor and the peripherals. Execution begins

on the next valid cycle after detection of the interrupt event

HALT:

This mode basically shuts down the device and places it in the lowest possible power-

consumption mode. If the internal zero-pin oscillators are used as the clock source, the

HALT mode turns them off, by default. To keep these oscillators from shutting down, the

INTOSCnHALTI bits in CLKCTL register may be used. The zero-pin oscillators may thus

be used to clock the CPU-watchdog in this mode. If the on-chip crystal oscillator is used

as the clock source, it is shut down in this mode. A reset or an external signal (through a

GPIO pin) or the CPU-watchdog can wake the device from this mode.

The CPU clock (OSCCLK) and the watchdog clock source should be from the same clock source before

attempting to put the device into HALT or STANDBY.

www.ti.com

TMS320F28069, TMS320F28069M, TMS320F28069F, TMS320F28068M, TMS320F28068F

TMS320F28067, TMS320F28066, TMS320F28065, TMS320F28064, TMS320F28063

TMS320F28062, TMS320F28062F

SPRS698J – NOVEMBER 2010 – REVISED SEPTEMBER 2021

Submit Document Feedback

Product Folder Links: TMS320F28069 TMS320F28069M TMS320F28069F TMS320F28068M

TMS320F28068F TMS320F28067 TMS320F28066 TMS320F28065 TMS320F28064 TMS320F28063

TMS320F28062 TMS320F28062F

TMS320F28062F Datasheet(PDF) 49 Page - Texas Instruments

TMS320F28062F Datasheet(HTML) 49 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL