TMUX7436F datasheet(34/50 Pages) TI2

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8 Detailed Description

8.1 Overview

The TMUX7436F device is a 44-V fault protected multiplexer with latch-up immunity in a 2:1, 2 channel

configuration. The device works well with dual supplies (±5 V to ±22 V), a single supply (8 V to 44 V), or

asymmetric supplies (such as VDD = 15 V, VSS = –5 V). The overvoltage protection feature on the source

pins works under powered and powered-off conditions, allowing for use in harsh industrial environments. The

powered-off condition includes floating power supplies, grounded power supplies, or power supplies at any level

that are below the undervoltage (UV) threshold.

8.2 Functional Block Diagram

S1A

S1B

VDD

VSS

TMUX7436F

Fault Detection/

Switch Driver/

Logic Decoder

SEL1

SEL2

S2A

S2B

8.3 Feature Description

8.3.1 Flat ON-Resistance

The TMUX7436F is designed with a special switch architecture to produce ultra-flat on-resistance (RON) across

most of the switch input operation region. The flat RON response allows the device to be used in precision sensor

applications since the RON is controlled regardless of the signals sampled. The architecture is implemented

without a charge pump so no unwanted noise is produced from the device to affect sampling accuracy.

8.3.2 Protection Features

The TMUX7436F offers a number of protection features to enable robust system implementations.

8.3.2.1 Input Voltage Tolerance

The maximum voltage that can be applied to any source input pin is +60 V or –60 V, regardless of supply

voltage. This allows the device to handle typical voltage fault condition in industrial applications. Caution: the

device is rated to handle a maximum stress of 85 V across different pins, such as the following:

1. Between source pins and supply rails: 85 V

For example, if the device is powered by VDD supply of 25 V, then the maximum negative signal level on any

source pin is –60 V to maintain the 60 V maximum rating on any source pin. If the device is powered by VDD

supply of 40 V, then the maximum negative signal level on any source pin is reduced to –45 V to maintain

the 85 V maximum rating across the source pin and the supply.

2. Between source pins and the drain pin: 85 V

For example, if channel S1A is ON and the voltage on S1A pin is 40 V, then the drain voltage D1 is also 40

V. In this case, the maximum negative voltage allowed on S1B is –45 V to maintain the 85 V maximum rating

across the source pin and the drain pin.

TMUX7436F

SCDS459A – OCTOBER 2022 – REVISED NOVEMBER 2022

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