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TAS5630B Datasheet(PDF) 26 Page - Texas Instruments

Part # TAS5630B
Description  TPA3251 175-W Stereo, 350-W Mono PurePath™ Ultra-HD Analog-Input Class-D Amplifier
PDF  43 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

TAS5630B Datasheet(HTML) 26 Page - Texas Instruments

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PVDD
GND
/RESET
INPUT_A
INPUT_B
/FAULT
/CLIP_OTW
+12V
TPA3251
OC_ADJ
VDD
M2
M1
/CLIP_OTW
/FAULT
INPUT_D
INPUT_C
GND
GND
INPUT_B
INPUT_A
C_START
/RESET
GVDD_AB
GVDD_CD
VBG
DVDD
AVDD
FREQ_ADJ
OSC_IOM
OSC_IOP
PVDD_CD
GND
BST_A
PVDD_AB
GND
OUT_B
BST_B
GND
OUT_C
PVDD_CD
OUT_A
PVDD_AB
GND
BST_C
BST_D
OUT_D
GND
GND
OUT_D
OUT_A
PVDD_AB
PVDD_CD
44
43
42
41
31
27
28
29
30
32
33
34
35
36
40
39
38
37
25
26
23
24
13
14
15
16
17
18
1
2
3
4
5
6
7
8
9
10
11
12
19
20
21
22
1µF
1µF
1µF
1µF
470uF
470uF
10µH
10µH
33nF
33nF
10µH
10µH
33nF
33nF
100nF
3R3
1µF
10nF
1µF
10k
22k
100nF
100nF
3R3
470uF
680nF
680nF
1nF
10nF
3R3
10nF
1nF
3R3
100nF
10µF
10µF
26
TPA3251
SLASE40D – MAY 2015 – REVISED APRIL 2016
www.ti.com
Product Folder Links: TPA3251
Submit Documentation Feedback
Copyright © 2015–2016, Texas Instruments Incorporated
10.2.4 Typical Application, Differential (2N) PBTL
TPA3251 can be configured either in stereo BTL mode, 4 channel SE mode, mono PBTL mode, or in 2.1 mixed
1x BTL + 2x SE mode depending on output power conditions and system design.
Figure 27. Typical Differential (2N) PBTL Application
10.2.4.1 Design Requirements
Refer to Stereo BTL Application for the Design Requirements.
Table 10. Design Requirements, PBTL Application
DESIGN PARAMETER
EXAMPLE
Low Power (Pull-up) Supply
3.3 V
Mid Power Supply 12 V
12 V
High Power Supply
12 - 36 V
Mode Selection
M2 = H
M1 = L
Analog Inputs
INPUT_A = ±3.9V (peak, max)
INPUT_B = ±3.9V (peak, max)
INPUT_C = Grounded
INPUT_D = Grounded
Output Filters
Inductor-Capacitor Low Pass FIlter (10 µH + 1 µF)
Speaker Impedance
2 - 4
Ω
10.2.4.2 Detailed Design Procedures
Refer to Stereo BTL Application for the Detailed Design Procedures.



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