Data Sheet

LT7826

analog.com

Rev. 0

7 of 19

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

Figure 3. Pin Configuration

Table 3. Pin Descriptions

PIN

NAME

DESCRIPTION

1

RUN

Digital control input with internal 0.55A pull-up current. Forcing the RUN pin voltage

below 1.155V shuts down the circuit. When the RUN pin voltage exceeds 1.2V, internal

circuitry starts up, including a low-dropout regulator for INTVCC.

2

MODE

Logic input signal with internal 1.6M pull-low resistance. MODE pin voltage higher

than 1.2V enables the switched capacitor operation. MODE voltage lower than 1V

activates standby mode, which is similar to shutdown mode but with INTVCC voltage

ready at 4V.

The MODE pin can also be utilized for synchronization. Applying an external clock

signal with a frequency higher than 100kHz and an amplitude larger than 2.6V would

cause the switching frequency to synchronize to this clock with inverted phase, i.e., the

SWL waveform would be antiphase to the clock at the MODE pin.

3

FAULT

Open drain output for fault indication. FAULT is pulled to SGND when the VLOW

voltage is out of the window of ± 320mV, around half of VHIGH voltage, or during other

fault conditions, including UVLO and over temperature.

4

INTVCC

Output of the internal linear low dropout regulator. The internal control and driver

circuits are powered by this voltage source. Must be decoupled to power ground with a

minimum of 1µF ceramic or other low Equivalent series resistance (ESR) capacitor. Do

not use the INTVCC pin to supply power to any other IC.

5

SGND

Signal Ground. All small-signal components should connect to this ground. Connect

this pin with PGND pins on the PCB.

6, 15

BSTL, BSTH

Bootstrapped Supplies to the floating drivers. Bootstrapped capacitors are connected

from BSTL to SWL, and from BSTH to SWH.

7, 8

PGND

Power Ground.

9

SWL

Low-side switching node. Connected to one terminal of flying capacitors.