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TPS56520PWPR Datasheet(PDF) 21 Page - Texas Instruments

Part # TPS56520PWPR
Description  TPS56x20 4.5V to 17V Input, 12A/9A/7A/5A Output, Synchronous Step-Down Voltage Regulator with Voltage Scaling
PDF  51 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

TPS56520PWPR Datasheet(HTML) 21 Page - Texas Instruments

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TPS56C20, TPS56920, TPS56720, TPS56520
www.ti.com
SLVSCB6E – NOVEMBER 2013 – REVISED DECEMBER 2017
Product Folder Links: TPS56C20 TPS56920 TPS56720 TPS56520
Submit Documentation Feedback
Copyright © 2013–2017, Texas Instruments Incorporated
Table 2. Ideal VOUT vs VOUT[6:0] Code
Code
Binary
VOUT
Code
Binary
VOUT
Code
Binary
VOUT
Code
Binary
VOUT
0
0000000
0.60
32
0100000
0.92
64
1000000
1.24
96
1100000
1.56
1
0000001
0.61
33
0100001
0.93
65
1000001
1.25
97
1100001
1.57
2
0000010
0.62
34
0100010
0.94
66
1000010
1.26
98
1100010
1.58
3
0000011
0.63
35
0100011
0.95
67
1000011
1.27
99
1100011
1.59
4
0000100
0.64
36
0100100
0.96
68
1000100
1.28
100
1100100
1.60
5
0000101
0.65
37
0100101
0.97
69
1000101
1.29
101
1100101
1.61
6
0000110
0.66
38
0100110
0.98
70
1000110
1.30
102
1100110
1.62
7
0000111
0.67
39
0100111
0.99
71
1000111
1.31
103
1100111
1.63
8
0001000
0.68
40
0101000
1.00
72
1001000
1.32
104
1101000
1.64
9
0001001
0.69
41
0101001
1.01
73
1001001
1.33
105
1101001
1.65
10
0001010
0.70
42
0101010
1.02
74
1001010
1.34
106
1101010
1.66
11
0001011
0.71
43
0101011
1.03
75
1001011
1.35
107
1101011
1.67
12
0001100
0.72
44
0101100
1.04
76
1001100
1.36
108
1101100
1.68
13
0001101
0.73
45
0101101
1.05
77
1001101
1.37
109
1101101
1.69
14
0001110
0.74
46
0101110
1.06
78
1001110
1.38
110
1101110
1.70
15
0001111
0.75
47
0101111
1.07
79
1001111
1.39
111
1101111
1.71
16
0010000
0.76
48
0110000
1.08
80
1010000
1.40
112
1110000
1.72
17
0010001
0.77
49
0110001
1.09
81
1010001
1.41
113
1110001
1.73
18
0010010
0.78
50
0110010
1.10
82
1010010
1.42
114
1110010
1.74
19
0010011
0.79
51
0110011
1.11
83
1010011
1.43
115
1110011
1.75
20
0010100
0.80
52
0110100
1.12
84
1010100
1.44
116
1110100
1.76
21
0010101
0.81
53
0110101
1.13
85
1010101
1.45
117
1110101
1.77
22
0010110
0.82
54
0110110
1.14
86
1010110
1.46
118
1110110
1.78
23
0010111
0.83
55
0110111
1.15
87
1010111
1.47
119
1110111
1.79
24
0011000
0.84
56
0111000
1.16
88
1011000
1.48
120
1111000
1.80
25
0011001
0.85
57
0111001
1.17
89
1011001
1.49
121
1111001
1.81
26
0011010
0.86
58
0111010
1.18
90
1011010
1.50
122
1111010
1.82
27
0011011
0.87
59
0111011
1.19
91
1011011
1.51
123
1111011
1.83
28
0011100
0.88
60
0111100
1.20
92
1011100
1.52
124
1111100
1.84
29
0011101
0.89
61
0111101
1.21
93
1011101
1.53
125
1111101
1.85
30
0011110
0.90
62
0111110
1.22
94
1011110
1.54
126
1111110
1.86
31
0011111
0.91
63
0111111
1.23
95
1011111
1.55
127
1111111
1.87
8.6.3
CheckSum Bit (VOUT Register Only)
The CheckSum bit should be set by the Master controller to be the exclusive-NOR of the D[6:0] bits (odd parity).
This will be used by the TPS56X20 to check that a valid data byte was received. If CheckSum is not equal to the
exclusive-NOR of these bits, the TPS56X20 assumes that an error occurred during the data transmission, and it
will not send an ACK bit, nor will it reset the VOUT to the received code (or, if the Control register, will not reset
the register contents as requested). The Master should try again to send the data. When reading back the VOUT
register, the parity bit is also sent back.



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