J

A

D(max)

JA

T max T

P

R

q

-

=

(4)

where

• TJmax = Maximum allowable junction temperature

• RθJA = Thermal resistance, junction to ambient, for the package, see the Thermal Information table.

• TA = Ambient temperature

The regulator dissipation is calculated using the below equation.

D

I

O

O

P

(V

V ) I

=

-

´

(5)

Power dissipation resulting from quiescent current is negligible. Excessive power dissipation triggers the thermal

protection circuit.

7.4.2 Layout Example

GND

IN

EN

OUT

FB

BYPASS

Bypass and FB Ground

Output Ground

Input Plane

Output Plane

Figure 7-7. Layout Example (DBV 6-Pin Package)

IN

Input

Output

COUT

Ground

Denotes a via to a connection made on another layer

GND

EN

OUT

NR/NC

CIN

Figure 7-8. Layout Example (DBV 5-Pin Package, New Chip)

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TPS792

SLVS337E – MARCH 2001 – REVISED JANUARY 2025

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