 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
DM505 Datasheet(PDF) 166 Page - Texas Instruments |
|
|
|||||||||||||||||||||||||||||
DM505 Datasheet(HTML) 166 Page - Texas Instruments |
|
|
166 / 295 page  166 DM505 SPRS976E – NOVEMBER 2016 – REVISED MAY 2018 www.ti.com Submit Documentation Feedback Specifications Copyright © 2016–2018, Texas Instruments Incorporated (1) All McASP2 signals are virtual functions that present alternate multiplexing options. These virtual functions are controlled via CTRL_CORE_SMA_SW_* registers. For more information on how to use these options, please refer to Device TRM, Chapter Control Module, Section Pad Configuration Registers. 5.9.6.13 DCAN and MCAN 5.9.6.13.1 DCAN The device provides one DCAN interface for supporting distributed realtime control with a high level of security. The DCAN interface implements the following features: • Supports CAN protocol version 2.0 part A, B • Bit rates up to 1 MBit/s • 64 message objects • Individual identifier mask for each message object • Programmable FIFO mode for message objects • Programmable loop-back modes for self-test operation • Suspend mode for debug support • Automatic bus on after Bus-Off state by a programmable 32-bit timer • Message RAM single error correction and double error detection (SECDED) mechanism • Direct access to Message RAM during test mode • Support for two interrupt lines: Level 0 and Level 1, plus separate ECC interrupt line • Local power down and wakeup support • Automatic message RAM initialization • Support for DMA access 5.9.6.13.2 MCAN The device supports one MCAN module connecting to the CAN network through external (for the device) transceiver for connection to the physical layer. The MCAN module supports up to 5 Mbit/s data rate and is compliant to ISO 11898-1:2015. The MCAN module implements the following features: • Conforms with ISO 11898-1:2015 • Full CAN FD support (up to 64 data bytes) • AUTOSAR and SAE J1939 support • Up to 32 dedicated Transmit Buffers • Configurable Transmit FIFO, up to 32 elements • Configurable Transmit Queue, up to 32 elements • Configurable Transmit Event FIFO, up to 32 elements • Up to 64 dedicated Receive Buffers • Two configurable Receive FIFOs, up to 64 elements each • Up to 128 filter elements • Internal Loopback mode for self-test • Maskable interrupts, two interrupt lines • Two clock domains (CAN clock/Host clock) • Parity/ECC support - Message RAM single error correction and double error detection (SECDED) mechanism • Local power-down and wakeup support • Timestamp Counter |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
