DM505 datasheet(37/295 Pages) TI2

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Terminal Configuration and Functions

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DM505

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SPRS976E – NOVEMBER 2016 – REVISED MAY 2018

Table 4-1. Pin Attributes(1) (continued)

BALL NUMBER

[1]

BALL NAME [2]

SIGNAL NAME [3]

MUXMODE

[4]

TYPE [5]

BALL

RESET

STATE [6]

BALL

RESET REL.

STATE [7]

BALL

RESET REL.

MUXMODE

[8]

I/O

VOLTAGE

VALUE [9]

POWER [10]

HYS [11]

BUFFER

TYPE [12]

PULL

UP/DOWN

TYPE [13]

DSIS [14]

A1, A17, A22, A8,

AB1, AB12, AB16,

AB2, AB21, AB22,

AB7, B22, E1,

G10, G16, H10,

H11, H15, H16,

H8, H9, J22, K1,

K10, K11, K13,

K14, K15, K16,

K9, M10, M11,

M12, M13, M16,

N10, N7, P1, P15,

P16, R12, R16,

R9, T14, V22

vss

GND

P21

vssa_adc

GND

B14

vssa_csi

GND

T19

vssa_dac

GND

D21

vssa_osc0

GND

C22

vssa_osc1

GND

E22

xi_osc0

1.8

vdda_osc

Yes

LVCMOS

Alog

B21

xi_osc1

1.8

vdda_osc

Yes

LVCMOS

Alog

D22

xo_osc0

1.8

vdda_osc

Yes

LVCMOS

Alog

C21

xo_osc1

1.8

vdda_osc

Yes

LVCMOS

Alog

xref_clk0

1.8/3.3

vddshv1

Yes

Dual Voltage

LVCMOS

PU/PD

clkout0

spi3_cs0

spi2_cs1

spi1_cs0

spi1_cs1

gpio3_31

Driver off

(1) NA in this table stands for Not Applicable.

(2) For more information on recommended operating conditions, see , Recommended Operating Conditions.

(3) The pullup or pulldown block strength is equal to: minimum = 50 μA, typical = 100 μA, maximum = 250 μA.

(4) The output impedance settings of this IO cell are programmable; by default, the value is DS[1:0] = 10, this means 40

Ω. For more information on DS[1:0] register configuration, see the

Device TRM.

(5) In PUx / PDy, x and y = 60 to 300 μA.

The output impedance settings (or drive strengths) of this IO are programmable (60 Ω, 80 Ω, 120 Ω) depending on the values of the I[2:0] registers.

4.3

Signal Descriptions

DM505 Datasheet(PDF) 37 Page - Texas Instruments

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