DM505 datasheet(77/295 Pages) TI2

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DM505

www.ti.com

SPRS976E – NOVEMBER 2016 – REVISED MAY 2018

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Specifications

5.1

Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)

PARAMETER(3)

MIN

MAX

UNIT

VSUPPLY (Steady-State)

Supply Voltage Ranges (Steady-

State)

Core (vdd, vdd_dspeve)

-0.3

1.5

Analog (vdda_per, vdda_ddr_dsp,

vdda_gmac_core, vdda_osc,

vdda_csi, vdda_dac, vdda_adc)

-0.3

2.0

vdds_ddr1, vdds_ddr2, vdds_ddr3

(1.35V mode)

-0.3

1.65

vdds_ddr1, vdds_ddr2, vdds_ddr3

(1.5V mode)

-0.3

1.8

vdds_ddr1, vdds_ddr2, vdds_ddr3

(1.8V mode)

-0.3

2.1

vdds18v, vdds18v_ddr1,

vdds18v_ddr2, vdds18v_ddr3

-0.3

2.1

vddshv1-6 (1.8V mode)

-0.3

2.1

vddshv1-6 (3.3V mode)

-0.3

3.8

VIO (Steady-State)

Input and Output Voltage Ranges

(Steady-State)

Core I/Os

-0.3

1.5

Analog I/Os

-0.3

2.0

I/O 1.35V

-0.3

1.65

I/O 1.5V

-0.3

1.8

1.8V I/Os

-0.3

2.1

3.3V I/Os

-0.3

3.8

Maximum slew rate, all supplies

105

V/s

VIO (Transient Overshoot /

Undershoot)

Input and Output Voltage Ranges (Transient Overshoot / Undershoot)

Note: valid for up to 20% of the signal period

0.2×VDD

(4)

Operating junction temperature range

Automotive

-40

+125

°C

TSTG

Storage temperature range after soldered onto PC Board

-55

+150

°C

Latch-up I-Test

I-test(5), All I/Os (if different levels then one line per level)

-100

100

Latch-up OV-Test

Over-voltage Test(6), All supplies (if different levels then one line per level)

N/A

1.5×Vsup

ply max

(1) Stresses beyond those listed as absolute maximum ratings may cause permanent damage to the device. These are stress ratings only,

and functional operation of the device at these or any other conditions beyond those listed under Section 5.4, Recommended Operating

Conditions, is not implied. Exposure to absolute maximum rated conditions for extended periods may affect device reliability.

(2) All voltage values are with respect to VSS, unless otherwise noted.

(3) See I/Os supplied by this power pin in Table 4-1 Ball Characteristics.

(4) VDD is the voltage on the corresponding power-supply pin(s) for the IO.

(5) Per JEDEC JESD78 at 125°C with specified I/O pin injection current and clamp voltage of 1.5 times maximum recommended I/O

voltage and negative 0.5 times maximum recommended I/O voltage.

(6) Per JEDEC JESD78 at 125°C.

5.2

ESD Ratings

VALUE

UNIT

VESD Electrostatic discharge

Human-Body model (HBM), per AEC Q100-002(1)

±1000

Charged-device model (CDM), per AEC

Q100-011

All pins

±250

Corner pins (A1,

AB1, A22, AB22)

±750

(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

5.3

Power on Hour (POH) Limits

Duty Cycle

Voltage Domain

Voltage (V) (max)

Frequency (MHz)

(max)

Tj(°C)

POH

All

100%

All

All Support OPPs

Automotive Profile(1)

20000

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