DM505LRBABF datasheet(247/295 Pages) TI2

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CACLMY

CACLMX

CACLM = CACLMX + CACLMY

LPDDR2

interface

SPRS917_LPDDR2_15

247

DM505

www.ti.com

SPRS976E – NOVEMBER 2016 – REVISED MAY 2018

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Applications, Implementation, and Layout

CACLM is the longest Manhattan distance of the CK/ADDR_CTRL signal class.

Figure 7-36. CACLM for LPDDR2 Interface

Trace routing specifications for the CK and the ADD_CTRL are specified in Table 7-21.

Table 7-21. CK and ADDR_CTRL Routing Specification

NO.

PARAMETER

MIN

TYP

MAX

UNIT

CK and ADDR_CTRL nominal trace length(1)

CACLM

mils

ADDR_CTRL skew

CK skew

Via count per each trace ADDR_CTRL, CK

Via count difference across ADDR_CTRL, CK

ADDR_CTRL-to-CK skew

Center-to-center ADDR_CTRL to other LPDDR2 trace spacing(2)(3)

Center-to-center ADDR_CTRL to other ADDR_CTRL trace spacing(2)

CK center-to-center spacing(4)

CK center-to-center spacing to other net(2)

(1) CACLM is the longest Manhattan distance of ADDR_CTRL and CK.

(2) Center-to-center spacing is allowed to fall to minimum for up to 1000 mils of routed length.

(3) Other LPDDR2 trace spacing means signals that are not part of the same CK, ADDR_CTRL signal net class.

(4) CK pair spacing is set to ensure proper differential impedance. Differential impedance should be Zo x 2, where Zo is the single ended

impedance.

7.8

DDR2 Board Design and Layout Guidelines

7.8.1

DDR2 General Board Layout Guidelines

To help ensure good signaling performance, consider the following board design guidelines:

•

Avoid crossing splits in the power plane.

•

Minimize Vref noise.

•

Use the widest trace that is practical between decoupling capacitors and memory module.

•

Maintain a single reference.

•

Minimize ISI by keeping impedances matched.

•

Minimize crosstalk by isolating sensitive bits, such as strobes, and avoiding return path discontinuities.

•

Use proper low-pass filtering on the Vref pins.

•

Keep the stub length as short as possible.

•

Add additional spacing for on-clock and strobe nets to eliminate crosstalk.

DM505LRBABF Datasheet(PDF) 247 Page - Texas Instruments

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