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DM505LRBABF Datasheet(PDF) 246 Page - Texas Instruments |
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DM505LRBABF Datasheet(HTML) 246 Page - Texas Instruments |
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246 / 295 page  SPRS917_LPDDR2_14 LPDDR2 DATA LPDDR2 ADDT_CTRL ADDR_CTRL SPRS917_LPDDR2_13 LPDDR2 DATA LPDDR2 ADDT_CTRL ADDR_CTRL Device ADDR_CTRL Output Buffer LPDDR2 ADDR_CTRL Input Buffer SPRS917_LPDDR2_12 Device CK Output Buffer LPDDR2 Input Buffer Routed Differentially CK- CK+ SPRS917_LPDDR2_11 246 DM505 SPRS976E – NOVEMBER 2016 – REVISED MAY 2018 www.ti.com Submit Documentation Feedback Applications, Implementation, and Layout Copyright © 2016–2018, Texas Instruments Incorporated 7.7.4.2 CK and ADDR_CTRL Routing Specification CK signals are routed as point-to-point differential, and ADDR_CTRL signals are routed as point-to-point single ended. The supported topology for CK and ADDR_CTRL are shown in Figure 7-32 through Figure 7-35. Note that ADDR_CTRL are routed very similar to DQ and CK is routed very similar to DQS. Figure 7-32. CK Signals Topology Figure 7-33. ADDR_CTRL Signals Topology Figure 7-34. CK Signals Routing Figure 7-35. ADDR_CTRL Signals Routing |
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