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TDA2SA Datasheet(PDF) 118 Page - Texas Instruments |
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TDA2SA Datasheet(HTML) 118 Page - Texas Instruments |
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118 / 427 page ![]() 118 TDA2SX, TDA2SG, TDA2SA TDA2HG, TDA2HV, TDA2HF, TDA2LF SPRS951F – DECEMBER 2015 – REVISED MAY 2019 www.ti.com Submit Documentation Feedback Product Folder Links: TDA2SX TDA2SG TDA2SA TDA2HG TDA2HV TDA2HF TDA2LF Terminal Configuration and Functions Copyright © 2015–2019, Texas Instruments Incorporated 4.4.15 Controller Area Network Interface (DCAN) NOTE For more information, see the Serial Communication Interface / DCAN section of the device TRM. Table 4-18. DCAN Signal Descriptions SIGNAL NAME DESCRIPTION TYPE BALL DCAN 1 dcan1_tx DCAN1 transmit data pin IO G20 dcan1_rx DCAN1 receive data pin IO G19/ AD17 DCAN 2 dcan2_tx DCAN2 transmit data pin IO E21/ B21 dcan2_rx DCAN2 receive data pin IO F20/ AC17/ B20 4.4.16 Ethernet Interface (GMAC_SW) CAUTION The I/O timings provided in Section 7, Timing Requirements and Switching Characteristics are valid only if signals within a single IOSET are used. The IOSETs are defined in the Table 7-71, Table 7-74, Table 7-79 and Table 7-86. NOTE For more information, see the Serial Communication Interfaces / Ethernet Controller section of the device TRM. Table 4-19. GMAC Signal Descriptions SIGNAL NAME DESCRIPTION TYPE BALL RGMII0 rgmii0_txc RGMII0 Transmit Clock O W9 rgmii0_txctl RGMII0 Transmit Enable O V9 rgmii0_txd3 RGMII0 Transmit Data O V7 rgmii0_txd2 RGMII0 Transmit Data O U7 rgmii0_txd1 RGMII0 Transmit Data O V6 rgmii0_txd0 RGMII0 Transmit Data O U6 rgmii0_rxc RGMII0 Receive Clock I U5 rgmii0_rxctl RGMII0 Receive Control I V5 rgmii0_rxd3 RGMII0 Receive Data I V4 rgmii0_rxd2 RGMII0 Receive Data I V3 rgmii0_rxd1 RGMII0 Receive Data I Y2 rgmii0_rxd0 RGMII0 Receive Data I W2 RGMII1 rgmii1_rxc RGMII1 Receive Clock I C5 rgmii1_rxctl RGMII1 Receive Control I A3 rgmii1_rxd0 RGMII1 Receive Data I A4 rgmii1_rxd1 RGMII1 Receive Data I B5 |
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