AD7991 datasheet(24/28 Pages) AD

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AD7991/AD7995/AD7999

Rev. 0 | Page 24 of 28

READING FROM THE AD7991/AD7995/AD7999

Reading data from the conversion result register is a 2-byte

operation, as shown in Figure 25. Therefore, a read operation

always involves two bytes.

After the AD7991/AD7995/AD7999 have received a read

address, any number of reads can be performed from the

conversion result register.

Following a start condition, the master writes the 7-bit address

of the AD7991/AD7995/AD7999 and then sets R/W to 1. The

AD7991/AD7995/AD7999 acknowledge this by pulling the

SDA line low. They then output the conversion result over the

I2C bus, preceded by four status bits. The status bits are two

leading 0s followed by the channel identifier bits. For the

AD7995 there are two trailing 0s, and for the AD7999 there are

four trailing 0s.

After the master has addressed the AD7991/AD7995/AD7999,

the part begins to power up on the ninth SCLK rising edge. At

the same time, the acquisition phase begins. When approximately

0.6 μs have elapsed, the acquisition phase ends. The input is

sampled and a conversion begins. This is done in parallel to the

read operation and should not affect the read operation. The

master reads back two bytes of data. On the ninth SCLK rising

edge of the second byte, if the master sends an ACK, it keeps

reading conversion results and the AD7991/AD7995/AD7999

powers up and performs a second conversion. If the master sends

a NO ACK, the AD7991/AD7995/AD7999 does not power up

on the ninth SCLK rising edge of the second byte. If a further

conversion is required, the part converts on the next channel, as

selected in the configuration register. See Table 11 for information

about the channel selection.

If the master sends a NO ACK on the ninth SCLK rising edge of

the second byte, the conversion is finished and no further

conversion is preformed.

To put the part into full shutdown mode, the user should issue a

stop condition to the AD7991/AD7995/AD7999. If the AD7991/

AD7995/AD7999 is not put into full shutdown mode, it will draw

a few tens of microamperes from the supply.

SDA

D10

SCL

D11

SCL (CONTINUED)

SDA (CONTINUED)

CHID1 CHID0

R/W

START BY

MASTER

ACK BY

ADC

NO ACK BY

MASTER

ACK BY

MASTER

STOP BY

MASTER

FRAME 1

SERIAL BUS ADDRESS BYTE

FRAME 2

MOST SIGNIFICANT DATA BYTE FROM ADC

FRAME 3

LEAST SIGNIFICANT DATA BYTE FROM ADC

Figure 25. Reading Two Bytes of Data from the AD7991Conversion Result Register

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