ADC12D040 datasheet(7/22 Pages) NSC

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DC and Logic Electrical Characteristics (Continued)

Unless otherwise specified, the following specifications apply for AGND = DGND = DR GND = 0V, V

A =VD = +5V, VDR =

+3.0V, PD = 0V, INT/EXT = V

D,VREF = +2.0V, OEA, OEB = 0V, fCLK = 40 MHz, tr =tf = 3 ns, CL = 20 pF/pin. Boldface limits

apply for T

J =TMIN to TMAX: all other limits TJ = 25˚C (Notes 7, 8, 9)

Symbol

Parameter

Conditions

Typical

(Note 10)

Limits

(Note 10)

Units

(Limits)

POWER SUPPLY CHARACTERISTICS

Analog Supply Current

PD Pin = DGND, V

REF = 2.0V

PD Pin = V

110

mA (max)

Digital Supply Current

PD Pin = DGND

PD Pin = V

mA (max)

Digital Output Supply Current

PD Pin = DGND, C

L = 0 pF (Note 14)

PD Pin = V

10.5

mA (max)

Total Power Consumption

PD Pin = DGND, C

L = 0 pF (Note 15)

PD Pin = V

600

700

PSRR1

Power Supply Rejection

Rejection of Full-Scale Error with

A = 4.75V vs. 5.25V

AC Electrical Characteristics

Unless otherwise specified, the following specifications apply for AGND = DGND = DR GND = 0V, V

A =VD = +5V, VDR =

+3.0V, PD = 0V, INT/EXT = V

D,VREF = +2.0V, OEA, OEB = 0V, fCLK = 40 MHz, tr =tf = 3 ns, CL = 20 pF/pin. Boldface limits

apply for T

J =TMIN to TMAX: all other limits TJ = 25˚C (Notes 7, 8, 9, 12)

Symbol

Parameter

Conditions

Typical

(Note 10)

Limits

(Note 10)

Units

(Limits)

CLK1

Maximum Clock Frequency

MHz (min)

CLK2

Minimum Clock Frequency

100

kHz

Clock High Time

Clock Low Time

CONV

Conversion Latency

Clock

Cycles

Data Output Delay after Rising

CLK Edge

DR = 3.0V

17.5

ns (max)

Aperture Delay

1.2

Aperture Jitter

ps rms

HOLD

Clock Edge to Data Transition

DIS

Data outputs into TRI-STATE

Mode

4ns

Data Outputs Active after

TRI-STATE

4ns

Power Down Mode Exit Cycle

500

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is

functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed

specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test

conditions.

Note 2: All voltages are measured with respect to GND = AGND = DGND DR GND = 0V, unless otherwise specified.

Note 3: When the input voltage at any pin exceeds the power supplies (that is, VIN < AGND, or VIN > VA), the current at that pin should be limited to 25 mA. The

50 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 25 mA to two.

Note 4: The absolute maximum junction temperature (TJmax) for this device is 150˚C. The maximum allowable power dissipation is dictated by TJmax, the

junction-to-ambient thermal resistance (

θJA), and the ambient temperature, (TA), and can be calculated using the formula PDMAX=(TJmax - TA )/θJA. The values

for maximum power dissipation listed above will be reached only when the device is operated in a severe fault condition (e.g. when input or output pins are driven

beyond the power supply voltages, or the power supply polarity is reversed). Obviously, such conditions should always be avoided.

Note 5: Human body model is 100 pF capacitor discharged through a 1.5 k

Ω resistor. Machine model is 220 pF discharged through 0Ω.

Note 6: The 235˚C reflow temperature refers to infrared reflow. For Vapor Phase Reflow (VPR), the following Conditions apply: Maintain the temperature at the top

of the package body above 183˚C for a minimum 60 seconds. The temperature measured on the package body must not exceed 220˚C. Only one excursion above

183˚C is allowed per reflow cycle.

Note 7: The inputs are protected as shown below. Input voltage magnitudes above VA or below GND will not damage this device, provided current is limited per

(Note 3). However, errors in the A/D conversion can occur if the input goes above VA or below GND by more than 100 mV. As an example, if VA is 4.75V, the full-scale

input voltage must be

≤4.85V to ensure accurate conversions.

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