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IP80C88 Datasheet(PDF) 18 Page - Intersil Corporation |
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IP80C88 Datasheet(HTML) 18 Page - Intersil Corporation |
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18 / 38 page ![]() 18 FN2949.4 February 22, 2008 (33) TCLRL RD Active Delay CL = 100pF 10 165 10 100 ns (34) TCLRH RD Inactive Delay CL = 100pF 10 150 10 80 ns (35) TRHAV RD Inactive to Next Address Active CL = 100pF TCLCL-45 - TCLCL-40 - ns (36) TCLHAV HLDA Valid Delay CL = 100pF 10 160 10 100 ns (37) TRLRH RD Width CL = 100pF 2TCLCL-75 - 2TCLCL-50 - ns (38) TWLWH WR Width CL = 100pF 2TCLCL-60 - 2TCLCL-40 - ns (39) TAVAL Address Valid to ALE Low CL = 100pF TCLCH-60 - TCLCH-40 - ns (40) TOLOH Output Rise Time From 0.8V to 2.0V - 15 - 15 ns (41) TOHOL Output Fall Time From 2.0V to 0.8V - 15 - 15 ns NOTES: 6. Signal at 82C84A shown for reference only. 7. Setup requirement for asynchronous signal only to guarantee recognition at next CLK. 8. Applies only to T2 state (8ns into T3). AC Electrical Specifications VCC = 5.0V ±10%; TA = 0°C to +70°C (C80C88, C80C88-2) VCC = 5.0V ±10%; TA = -40°C to +85°C (I80C88, I80C88-2) VCC = 5.0V ±10%; TA = -55° to +125°C (M80C88) (Continued) SYMBOL PARAMETER TEST CONDITIONS 80C88 80C88-2 UNITS MIN MAX MIN MAX 80C88 |
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