GD32H757ZMT7 datasheet(54/151 Pages) GIGADEVICE

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GD32H757xx Datasheet

BGA100

Pin Name

Pins

Type(1)

I/O

Level(2)

Functions description

I2C0_SMBA, SPI0_MOSI, I2S0_SD, I2C3_SMBA,

SPI2_MOSI, I2S2_SD, SPI5_MOSI, I2S5_SD, CAN1_RX,

USBHS0_ULPI_D7, ETH0_PPS_OUT, EXMC_SDCKE1,

DCI_D10, UART4_RX, EVENTOUT

PB6

I/O

Default: PB6

Alternate: TIMER15_MCH0, TIMER3_CH0, EXMC_D11,

I2C0_SCL, I2C3_SCL, USART0_TX, CAN1_TX,

OSPIM_P0_CSN, HPDF_DATAIN5, EXMC_SDNE1,

DCI_D5, UART4_TX, EVENTOUT

PB7

I/O

Default: PB7

Alternate: TIMER16_MCH0, TIMER3_CH1, I2C0_SDA,

I2C3_SDA, USART0_RX, HPDF_CKIN5,

EXMC_NL/EXMC_NADV, DCI_VSYNC, EVENTOUT

Additional: LVD_IN

BOOT

I/O

Default: BOOT

PB8

I/O

Default: PB8

Alternate: TIMER15_CH0, TIMER3_CH2, HPDF_CKIN7,

I2C0_SCL, I2C3_SCL, SDIO0_CKIN, UART3_RX,

CAN0_RX, SDIO1_D4, SDIO0_D4, DCI_D6, TLI_B6,

EVENTOUT

PB9

I/O

Default: PB9

Alternate: TIMER16_CH0, TIMER3_CH3, HPDF_DATAIN7,

I2C0_SDA, SPI1_NSS, I2S1_WS, I2C3_SDA,

SDIO0_CMDDIR, UART3_TX, CAN0_TX, SDIO1_D5,

I2C3_SMBA, SDIO0_D5, DCI_D7, TLI_B7, EVENTOUT

PE0

I/O

Default: PE0

Alternate: TIMER3_ETI, UART7_RX, SAI1_MCLK0,

EXMC_NBL0, DCI_D2, TLI_R0, EVENTOUT

PE1

I/O

Default: PE1

Alternate: UART7_TX, EXMC_NBL1, DCI_D3, TLI_R6,

EVENTOUT

VSS

Default: VSS

PDR_ON

Default: PDR_ON(5)

Notes:

(1)

Type: I = input, O = output, P = power.

(2)

I/O Level: 5VT = 5 V tolerant.

(3)

USBHS0_DM and USBH0_DP pins can only be used for USBHS.

(4)

PC2_C and PC3_C can only be used as analog pins.

(5)

PDR_ON pin should be pulled up to VDD, refer to Figure 4-3. Recommended PDR_ON

pin circuit(1).

GD32H757ZMT7 Datasheet(PDF) 54 Page - GigaDevice Semiconductor (Beijing) Inc.

GD32H757ZMT7 Datasheet(HTML) 54 Page - GigaDevice Semiconductor (Beijing) Inc.

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