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GD32H757ZMT7 Datasheet(PDF) 83 Page - GigaDevice Semiconductor (Beijing) Inc.

Part # GD32H757ZMT7
Description  Arm® Cortex®-M7 32-bit MCU
PDF  151 Pages
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Manufacturer  GIGADEVICE [GigaDevice Semiconductor (Beijing) Inc.]
Direct Link  http://www.gigadevice.com/
Logo GIGADEVICE - GigaDevice Semiconductor (Beijing) Inc.

GD32H757ZMT7 Datasheet(HTML) 83 Page - GigaDevice Semiconductor (Beijing) Inc.

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GD32H757xx Datasheet
82
3.45.
Hardware semaphore (HWSEM)
32 semaphores.
An interrupt is generated when a semaphore is unlocked.
Semaphore is unlocked only when MID[3:0] and PID[7:0] are matched.
Hardware semaphore (HWSEM) provides a non-blocking mechanism to ensure the
synchronous of processes. HWSEM realizes 32 semaphores in an atomic way, supporting
semaphore write lock and read lock, and semaphore can only be unlocked when bus master
and process are matched.
3.46.
Universal serial bus high-speed interface (USBHS)
Supports USB 2.0 Host mode at High-Speed(480Mb/s), Full-Speed(12Mb/s) or Low-
Speed(1.5Mb/s).
Supports USB 2.0 device mode at High-Speed(480Mb/s) or Full-Speed(12Mb/s).
Supports OTG protocol with HNP (Host Negotiation Protocol) and SRP (Session
Request Protocol).
USB High-Speed (USBHS) controller provides a USB-connection solution for portable
devices. USBHS supports both host and device modes, as well as OTG mode with HNP (Host
Negotiation Protocol) and SRP (Session Request Protocol). USBHS contains an embedded
USB PHY internal which can be configured as High-Speed or Full-Speed. USBHS supports
all the four types of transfer (control, bulk, Interrupt and isochronous) defined in USB 2.0
protocol. There is also a DMA engine operating as an AHB bus master in USBHS to speed
up the data transfer between USBHS and system. For Full-Speed operation, battery charging
detection (BCD), attach detection protocol (ADP), and link power management (LPM) are
also supported.
3.47.
Debug mode
JTAG and SWD Debug Port.
The GD32H757xx series provide a large variety of debug, trace and test features. They are
implemented with a standard configuration of the Arm® CoreSight™ module together with a
daisy chained standard TAP controller. Debug and trace functions are integrated into the
ARM® Cortex®-M7. The debug system supports serial wire debug (SWD) and trace functions
in addition to standard JTAG debug.
3.48.
Package and operation temperature
LQFP144 (GD32H757Zx), BGA100\LQFP100 (GD32H757Vx).



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