GD32H757ZMT7 datasheet(66/151 Pages) GIGADEVICE

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GD32H757xx Datasheet

3.5.

Power saving modes

The MCU supports three kinds of power saving modes to achieve even lower power

consumption. They are sleep mode, deep-sleep mode, and standby mode. These operating

modes reduce the power consumption and allow the application to achieve the best balance

between the CPU operating time, speed and power consumption.



Sleep mode

In sleep mode, only the clock of CPU core is off. All peripherals continue to operate and

any interrupt / event can wake up the system.



Deep-sleep mode

In deep-sleep mode, all clocks in the 0.9V domain are off, and all of LPIRC4M, IRC64M,

HXTAL and PLLs are disabled. Only the contents of SRAM and registers are retained.

Any interrupt or wakeup event from EXTI lines can wake up the system from the deep-

sleep mode including the 16 external lines, the RTC alarm, RTC tamper and timestamp

event, LXTAL clock stuck, the LVD \ LVD \ OVD, CMP output, LPDTS wakeup, ENET

wakeup, RTC wakeup, CAN wakeup, I2C wakeup, USART0 wakeup and USBHS

wakeup. When exiting the deep-sleep mode, the IRC64M is selected as the system clock.



Standby mode

In standby mode, the whole 0.9V domain is power off, the LDO is shut down, and all of

LPIRC4M, IRC64M, HXTAL and PLLs are disabled. The contents of SRAM and registers

in 0.9V power domain are lost. There are four wakeup sources for the standby mode,

including the external reset from NRST pin, the RTC, the FWDGT reset, WKUP pins and

LCKMD.

3.6.

Electronic fuse (EFUSE)



One-time programmable nonvolatile efuse storage cells organized as 32*32 bits.



Double-bit redundant backup mechanism.



All bits in the efuse cannot be rollback from 1 to 0.



Each bit in efuse macro can only be programmed once, and software must avoid

reprogramming.



Voltage range for program: 1.71~1.98 V.



Voltage range for read: 0.72~1.05 V.

The Efuse controller has efuse macro that store system parameters. As a non-volatile unit of

storage, the bit of efuse macro cannot be restored to 0 once it is programmed to 1.

3.7.

Trigger selection controller (TRIGSEL)



Supports different optional trigger inputs.



Trigger input source could be external input signal or output of peripheral.



Trigger selection output could be for external output or peripheral.

GD32H757ZMT7 Datasheet(PDF) 66 Page - GigaDevice Semiconductor (Beijing) Inc.

GD32H757ZMT7 Datasheet(HTML) 66 Page - GigaDevice Semiconductor (Beijing) Inc.

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