TMP442 datasheet(22/63 Pages) TI2

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START

Target Address

R/W

ACK from Target

STOP

ACK from Target

Data to Register N

Target controls SDA line

Controller controls SDA line

Figure 7-12. Write to Single Register

7.5.4.2 Reads

For a read operation, the controller sends a START condition followed by the target address with the R/W bit

set to 0 (signifying a write). The target acknowledges the write request, and the controller sends the Register

Pointer. After the Register Pointer, the host initiates a restart, followed by the target address with the R/W bit set

to 1 (signifying a read). The controller continues to send out clock pulses, but releases the SDA line so that the

target can transmit data. At the end of every byte of data, the controller sends an ACK to the target, letting the

target know that the controller is ready for more data. Figure 7-13 shows an example of reading a single byte

from a target register. The TMP4719 does not support multiple register reads with a single transaction.

If repeated reads from the same register are desired, the pointer register bytes do not have to be continually

sent, as shown in Figure 7-14. The TMP4719 remembers the pointer register value until the value is changed by

the next write operation. Note that after the device POR, the pointer address is defaulted to 0h. Therefore, the

controller can read (and re-read) the Temp_Local register content without setting the pointer value.

START

Target Address

R/W

ACK from Target

STOP

NACK from Controller

Data from Register N

Re-START

Target Address

R/W

ACK from Target

Target controls SDA line

Controller controls SDA line

Figure 7-13. Read from Single Register

TMP4719

SBOSAJ7A – OCTOBER 2025 – REVISED DECEMBER 2025

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TMP442 Datasheet(PDF) 22 Page - Texas Instruments