64WQ datasheet(36/46 Pages) NUMONYX

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32WQ and 64WQ Family with Asynchronous RAM

Datasheet

November 2007

Order Number: 251407-13

32WQ and 64WQ Family with Asynchronous RAM

17.0

PSRAM Operations

17.1

Power-Up Sequence and Initialization

The PSRAM functionality and reliability are independent of the power-up sequence and

slew rate of the core P-VCC. Any power-up sequence and slew rate is possible under use

conditions. PSRAM reliability are also independent of the power-down sequence and

slew rate of the core P-VCC.

The following power-up sequence and register setting should be used before starting

normal operation. The PSRAM power-up sequence is represented in Figure 14.

Following power application, make P-Mode high after fixing P-Mode to a low level for a

period of tI1. Make P-CS# high before making P-Mode high. P-CS# and P-Mode are

fixed to a high level for period of tI3.

17.1.1

16Mbit PSRAM Power-Up Sequence (Non-Page Mode)

For the non-page mode PSRAM (part’s RD38F1030W0YQF, PF38F1030W0YQF,

RD38F2030W0YQF, PF38F2030W0YQF) the PSRAM functionality and reliability must be

independent of the power-up sequence and power-up slew rate of the core Vcc and the

I/O Vcc (Vccq.) Any power-up sequence and power-up slew rate is possible under use

conditions. PSRAM reliability must also be independent of the power-down sequence

and power-down slew rate of the core Vcc and the I/O Vcc (Vccq.)

Once power supply voltages have reached the minimum spec value of 1.7V (or higher),

CE# must be maintained high for minimum 200us prior to commencing valid PSRAM

operation.

Figure 14: Timing Waveform for Power-Up Sequence

Table 18: Power-Up Sequence Specifications

Parameter

Description

Min

Max

Unit

Notes

tI1

Power application with P-Mode held low

—

μs1,2,3

tI2

P-CS# high to P-Mode high

—

tI3

P-Mode high to P-CS# low

500

—

μs

Notes:

Toggle P-Mode to low when starting the power-up sequence.

tI1 is specified from when the power supply voltage reaches VCCMIN.

Does not apply to 38F2020W0ZTQ1, 38F2020W0ZBQ1, 38F2030W0YTQ1, 38F2030W0YBQ1,

38F2030W0ZTQ2, and 38F2030W0ZBQ2, 38F1030W0ZTQ0, 38F1030W0ZBQ0 line items. Valid

PSRAM operations for these line items can begin 200 μs after P-Vcc has reached P-Vcc min.

tI3

tI1

tI2

Power Up

P-VCC

P-CS#

P-MODE

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