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DRA752ABC Datasheet(PDF) 103 Page - Texas Instruments |
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DRA752ABC Datasheet(HTML) 103 Page - Texas Instruments |
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103 / 443 page  103 DRA756, DRA755, DRA754, DRA752 DRA751, DRA750, DRA746, DRA745, DRA744 www.ti.com SPRS950F – DECEMBER 2015 – REVISED MAY 2019 Submit Documentation Feedback Product Folder Links: DRA756 DRA755 DRA754 DRA752 DRA751 DRA750 DRA746 DRA745 DRA744 Terminal Configuration and Functions Copyright © 2015–2019, Texas Instruments Incorporated Table 4-4. VIP Signal Descriptions (continued) SIGNAL NAME DESCRIPTION TYPE BALL vin6a_fld0 Video Input 6 Port A Field ID input (2) I C14 vin6a_hsync0 Video Input 6 Port A Horizontal Sync input (2) I F12 vin6a_vsync0 Video Input 6 Port A Vertical Sync input (2) I G12 vin6a_d0 Video Input 6 Port A Data input (2) I C17 / D18 vin6a_d1 Video Input 6 Port A Data input (2) I B19 vin6a_d2 Video Input 6 Port A Data input (2) I F15 vin6a_d3 Video Input 6 Port A Data input (2) I B18 vin6a_d4 Video Input 6 Port A Data input (2) I A16 vin6a_d5 Video Input 6 Port A Data input (2) I C15 vin6a_d6 Video Input 6 Port A Data input (2) I A18 vin6a_d7 Video Input 6 Port A Data input (2) I A19 vin6a_d8 Video Input 6 Port A Data input (2) I F14 vin6a_d9 Video Input 6 Port A Data input (2) I G14 vin6a_d10 Video Input 6 Port A Data input (2) I A13 vin6a_d11 Video Input 6 Port A Data input (2) I E14 vin6a_d12 Video Input 6 Port A Data input (2) I A12 vin6a_d13 Video Input 6 Port A Data input (2) I B13 vin6a_d14 Video Input 6 Port A Data input (2) I A11 vin6a_d15 Video Input 6 Port A Data input (2) I B12 (1) The VIP1 interface (Video Input 1a and Video Input 1b in Table 4-4) signal sets are NOT supported in the DRA74x device. For more details on the device differentiation, refer to the Table 3-1, Device Comparison. (2) The VIP3 interface (Video Input 5 and Video Input 6 in Table 4-4) signal sets are NOT supported in the DRA74x device. For more details on the device differentiation, refer to the Table 3-1, Device Comparison. 4.4.2 Display Subsystem – Video Output Ports CAUTION The I/O timings provided in Section 7, Timing Requirements and Switching Characteristics are valid only if signals within a single IOSET are used. The IOSETs are defined in the Table 7-19 and Table 7-20. Table 4-5. DSS Signal Descriptions SIGNAL NAME DESCRIPTION TYPE BALL DPI Video Output 1 vout1_clk Video Output 1 Clock output O D11 vout1_de Video Output 1 Data Enable output O B10 vout1_fld Video Output 1 Field ID output.This signal is not used for embedded sync modes. O B11 vout1_hsync Video Output 1 Horizontal Sync output.This signal is not used for embedded sync modes. O C11 vout1_vsync Video Output 1 Vertical Sync output.This signal is not used for embedded sync modes. O E11 vout1_d0 Video Output 1 Data output O F11 vout1_d1 Video Output 1 Data output O G10 vout1_d2 Video Output 1 Data output O F10 vout1_d3 Video Output 1 Data output O G11 vout1_d4 Video Output 1 Data output O E9 vout1_d5 Video Output 1 Data output O F9 vout1_d6 Video Output 1 Data output O F8 |
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