LAN9312 datasheet(135/458 Pages) SMSC

135 / 458 page

High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface

Datasheet

SMSC LAN9312

135

Revision 1.2 (04-08-08)

DATASHEET

read them as shown in Figure 9.9. It is assumed that the host has previously read the associated

status word from the RX Status FIFO, to ascertain the data size and any error conditions.

9.9.3

RX Status Format

Note:

Though the Host MAC is communicating locally with the switch fabric MAC, the events

described in the RX Status word may still occur.

Figure 9.9 RX Packet Format

BITS

DESCRIPTION

Reserved.

This bit is reserved. Reads 0.

Filtering Fail.

When set, this bit indicates that the associated frame failed the address recognizing

filtering.

29:16

Packet Length.

The size, in bytes, of the corresponding received frame.

Error Status (ES).

When set this bit indicates that the Host MAC Interface Layer (MIL) has reported

an error. This bit is the Internal logical “or” of bits 11,7,6 and 1.

Reserved.

These bits are reserved. Reads 0.

Broadcast Frame.

When set, this bit indicates that the received frame has a Broadcast address.

Length Error (LE).

When set, this bit indicates that the actual length does not match with the

length/type field of the received frame.

Runt Frame.

When set, this bit indicates that frame was prematurely terminated before the collision

window (64 bytes). Runt frames are passed on to the host only if the Pass Bad Frames bit (PASSBAD)

of the Host MAC Control Register (HMAC_CR) is set.

Multicast Frame.

When set, this bit indicates that the received frame has a Multicast address.

9:8

Reserved.

These bits are reserved. Reads 0.

ofs + First Data DWORD

Last Data DWORD

Host Read

Order

1st

2nd

Last

Optional Pad DWORD0

Optional Pad DWORDn

Optional offset DWORD0

Optional offset DWORDn

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