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LAN9312 Datasheet(PDF) 453 Page - SMSC Corporation |
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LAN9312 Datasheet(HTML) 453 Page - SMSC Corporation |
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453 / 458 page ![]() High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface Datasheet SMSC LAN9312 453 Revision 1.2 (04-08-08) DATASHEET 15.5.10 Microwire Timing This section specifies the Microwire EEPROM interface timing requirements. Please refer to Section 10.2.3, "Microwire EEPROM," on page 144 for a functional description of this serial interface. Figure 15.10 Microwire Timing Table 15.14 Microwire Timing Values SYMBOL DESCRIPTION MIN TYP MAX UNITS tckcyc EECLK cycle time 1110 1130 nS tckh EECLK high time 550 570 nS tckl EECLK low time 550 570 nS tcshckh EECS high before rising edge of EECLK 1070 nS tcklcsl EECLK falling edge to EECS low 30 nS tdvckh EEDO valid before rising edge of EECLK 550 nS tckhdis EEDO disable after rising edge of EECLK 550 nS tdsckh EEDI setup to rising edge of EECLK 90 nS tdhckh EEDI hold after rising edge of EECLK 0 nS tckldis EECLK low to EEDO data disable 580 nS tcshdv EEDI valid after EECS high (VERIFY) 600 nS tdhcsl EEDI hold after EECS low (VERIFY) 0 nS tcsl EECS low 1070 nS EECLK EEDO EEDI EECS tckldis tcshckh EEDI (VERIFY) tckh tckl tckcyc tcklcsl tcsl tdvckh tckhdis tdsckh tdhckh tdhcsl tcshdv |
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