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RH850 Datasheet(PDF) 1 Page - Renesas Technology Corp |
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RH850 Datasheet(HTML) 1 Page - Renesas Technology Corp |
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1 / 72 page ![]() Page 1 of 72 R01DS0505ED0100 Rev.1.00 September 30, 2025 Datasheet RH850 /P1M-E Renesas microcontroller Section 1 Overview RH850/P1M-E is a product series of Renesas Electronics’ single-chip microco ntroller RH850 family. This section describes the overview of RH850/P1M-E. This product has Security installed. For the specification of Security function, please contact with agent/distributor. 1.1 Outline This product is a 32-bit single-chip microco ntroller with multiple CPUs, Code Flash, Data Flash, RAM modules, DMA controllers, many communication interfaces that are used in the automotive applications, A/D converters, timer units, etc. The main features are as below. (1) RH850 CPU This product contains two RH850G3Ms: one operates as the master CPU for normal operation and another as a checker CPU that monitors the operation of the master CPU. The two CPUs operate in lock step mode. The architecture of this dual-core CPU unit realizes the compact footprint of the programs by 2-byte basic instructions and high-level language compiler oriented instruction sets. This dual-core CPU unit has very quick interrupt response time so that it can support hard real-time applications. (2) On-chip Code Flash and Data Flash This chip has high-speed Code Flash from which the CPU can fetch the instructions and the constant data. Its capacity is up to 2MB. This Code Flash can be reprogrammed in the situation that the chip is mounted in the application systems. This chip also has Data Flash with EEPROM emulation capability. Its capacity is up to 64KB. (3) Rich peripheral functionality The RH850/P1M-E incorporates standard communication controllers such as CAN, LIN, FlexRay, and serial communications in addition to timers and A/D converters best suited for the automobile chassis applications. In addition, the RH850/P1M-E incorporates SENT and PSI5 communication controllers that can be used for sensor interface. (4) Functional safety support This chip equips several dedicated functionalities including the Lock-Step Dual Core configuration for the CPU, the memory protection with ECC, the bus protection with ECC, the peripheral module protection, and voltage/clock monitors to support the functional safety standard (ASIL) required in the automotive applications. |
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